+
+#else /* CONFIG_DM_I2C */
+/* The DM I2C functions */
+
+static int designware_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
+ int nmsgs)
+{
+ struct dw_i2c *i2c = dev_get_priv(bus);
+ int ret;
+
+ debug("i2c_xfer: %d messages\n", nmsgs);
+ for (; nmsgs > 0; nmsgs--, msg++) {
+ debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
+ if (msg->flags & I2C_M_RD) {
+ ret = __dw_i2c_read(i2c->regs, msg->addr, 0, 0,
+ msg->buf, msg->len);
+ } else {
+ ret = __dw_i2c_write(i2c->regs, msg->addr, 0, 0,
+ msg->buf, msg->len);
+ }
+ if (ret) {
+ debug("i2c_write: error sending\n");
+ return -EREMOTEIO;
+ }
+ }
+
+ return 0;
+}
+
+static int designware_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
+{
+ struct dw_i2c *i2c = dev_get_priv(bus);
+
+ return __dw_i2c_set_bus_speed(i2c->regs, i2c->scl_sda_cfg, speed);
+}
+
+static int designware_i2c_probe_chip(struct udevice *bus, uint chip_addr,
+ uint chip_flags)
+{
+ struct dw_i2c *i2c = dev_get_priv(bus);
+ struct i2c_regs *i2c_base = i2c->regs;
+ u32 tmp;
+ int ret;
+
+ /* Try to read the first location of the chip */
+ ret = __dw_i2c_read(i2c_base, chip_addr, 0, 1, (uchar *)&tmp, 1);
+ if (ret)
+ __dw_i2c_init(i2c_base, 0, 0);
+
+ return ret;
+}
+
+static int designware_i2c_probe(struct udevice *bus)
+{
+ struct dw_i2c *priv = dev_get_priv(bus);
+
+ if (device_is_on_pci_bus(bus)) {
+#ifdef CONFIG_DM_PCI
+ /* Save base address from PCI BAR */
+ priv->regs = (struct i2c_regs *)
+ dm_pci_map_bar(bus, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
+#ifdef CONFIG_X86
+ /* Use BayTrail specific timing values */
+ priv->scl_sda_cfg = &byt_config;