- REG_WRITE (PCI_CSR_BASE, PCI_CRP_AD_CBE_OFFSET, offset);
- REG_READ (PCI_CSR_BASE, PCI_CRP_RDATA_OFFSET, *data);
-}
-
-void crp_write (unsigned int offset, unsigned int data)
-{
- /*The CRP address register bit 16 indicates that we want to do a write */
- REG_WRITE (PCI_CSR_BASE, PCI_CRP_AD_CBE_OFFSET,
- PCI_CRP_WRITE | offset);
- REG_WRITE (PCI_CSR_BASE, PCI_CRP_WDATA_OFFSET, data);
-}
-
-/*struct pci_controller *hose*/
-void pci_ixp_init (struct pci_controller *hose)
-{
- unsigned int regval;
-
- hose->first_busno = 0;
- hose->last_busno = 0x00;
-
- /* System memory space */
- pci_set_region (hose->regions + 0,
- PCI_MEMORY_BUS,
- PCI_MEMORY_PHY, PCI_MEMORY_SIZE, PCI_REGION_SYS_MEMORY);
-
- /* PCI memory space */
- pci_set_region (hose->regions + 1,
- PCI_MEM_BUS,
- PCI_MEM_PHY, PCI_MEM_SIZE, PCI_REGION_MEM);
- /* PCI I/O space */
- pci_set_region (hose->regions + 2,
- PCI_IO_BUS, PCI_IO_PHY, PCI_IO_SIZE, PCI_REGION_IO);
-
- hose->region_count = 3;
-
- pci_register_hose (hose);
-
-/*
- ==========================================================
- Init IXP PCI
- ==========================================================
-*/
- REG_READ (PCI_CSR_BASE, PCI_CSR_OFFSET, regval);
- regval |= 1 << 2;
- REG_WRITE (PCI_CSR_BASE, PCI_CSR_OFFSET, regval);
-
- configure_pins ();
-
- READ_GPIO_REG (IXP425_GPIO_GPOUTR, regval);
- WRITE_GPIO_REG (IXP425_GPIO_GPOUTR, regval & (~(1 << 13)));
- udelay (533);
- sys_pci_gpio_clock_config ();
- REG_WRITE (PCI_CSR_BASE, PCI_INTEN_OFFSET, 0);
- udelay (100);
- READ_GPIO_REG (IXP425_GPIO_GPOUTR, regval);
- WRITE_GPIO_REG (IXP425_GPIO_GPOUTR, regval | (1 << 13));
- udelay (533);
- crp_write (PCI_CFG_BASE_ADDRESS_0, IXP425_PCI_BAR_0_DEFAULT);
- crp_write (PCI_CFG_BASE_ADDRESS_1, IXP425_PCI_BAR_1_DEFAULT);
- crp_write (PCI_CFG_BASE_ADDRESS_2, IXP425_PCI_BAR_2_DEFAULT);
- crp_write (PCI_CFG_BASE_ADDRESS_3, IXP425_PCI_BAR_3_DEFAULT);
- crp_write (PCI_CFG_BASE_ADDRESS_4, IXP425_PCI_BAR_4_DEFAULT);
- crp_write (PCI_CFG_BASE_ADDRESS_5, IXP425_PCI_BAR_5_DEFAULT);
- /*Setup PCI-AHB and AHB-PCI address mappings */
- REG_WRITE (PCI_CSR_BASE, PCI_AHBMEMBASE_OFFSET,
- IXP425_PCI_AHBMEMBASE_DEFAULT);
-
- REG_WRITE (PCI_CSR_BASE, PCI_AHBIOBASE_OFFSET,
- IXP425_PCI_AHBIOBASE_DEFAULT);
-
- REG_WRITE (PCI_CSR_BASE, PCI_PCIMEMBASE_OFFSET,
- IXP425_PCI_PCIMEMBASE_DEFAULT);
-
- crp_write (PCI_CFG_SUB_VENDOR_ID, IXP425_PCI_SUB_VENDOR_SYSTEM);
-
- REG_READ (PCI_CSR_BASE, PCI_CSR_OFFSET, regval);
- regval |= PCI_CSR_IC | PCI_CSR_ABE | PCI_CSR_PDS;
- REG_WRITE (PCI_CSR_BASE, PCI_CSR_OFFSET, regval);
- crp_write (PCI_CFG_COMMAND, PCI_CFG_CMD_MAE | PCI_CFG_CMD_BME);
- udelay (1000);
-
- pci_write_config_word (0, PCI_CFG_COMMAND, INITIAL_PCI_CMD);
- REG_WRITE (PCI_CSR_BASE, PCI_ISR_OFFSET, PCI_ISR_PSE
- | PCI_ISR_PFE | PCI_ISR_PPE | PCI_ISR_AHBE);
-#ifdef CONFIG_PCI_SCAN_SHOW
- printf ("Device bus dev func deviceID vendorID \n");
-#endif
- pci_bus_scan ();
-}
-
-void configure_pins (void)
-{
- unsigned int regval;
-
- /* Disable clock on GPIO PIN 14 */
- READ_GPIO_REG (IXP425_GPIO_GPCLKR, regval);
- WRITE_GPIO_REG (IXP425_GPIO_GPCLKR, regval & (~(1 << 8)));
- READ_GPIO_REG (IXP425_GPIO_GPCLKR, regval);
-
- READ_GPIO_REG (IXP425_GPIO_GPOER, regval);
- WRITE_GPIO_REG (IXP425_GPIO_GPOER,
- (((~(3 << 13)) & regval) | (0xf << 8)));
- READ_GPIO_REG (IXP425_GPIO_GPOER, regval);
-
- READ_GPIO_REG (IXP425_GPIO_GPIT2R, regval);
- WRITE_GPIO_REG (IXP425_GPIO_GPIT2R,
- (regval &
- ((0x1 << 9) | (0x1 << 6) | (0x1 << 3) | 0x1)));
- READ_GPIO_REG (IXP425_GPIO_GPIT2R, regval);
-
- READ_GPIO_REG (IXP425_GPIO_GPISR, regval);
- WRITE_GPIO_REG (IXP425_GPIO_GPISR, (regval | (0xf << 8)));
- READ_GPIO_REG (IXP425_GPIO_GPISR, regval);