- Select this to enable a debug UART for Rockchip devices. This uses
- the ns16550 driver. You will need to #define CONFIG_SYS_NS16550 in
- your board config header. The clock input is automatically set to
- use the oscillator (24MHz).
+ Enable this option to show a message when the debug UART is ready
+ for use. You will see a message like "<debug_uart> " as soon as
+ U-Boot has the UART ready for use (i.e. your code calls
+ debug_uart_init()). This can be useful just as a check that
+ everything is working.
+
+config ALTERA_JTAG_UART
+ bool "Altera JTAG UART support"
+ depends on DM_SERIAL
+ help
+ Select this to enable an JTAG UART for Altera devices.The JTAG UART
+ core implements a method to communicate serial character streams
+ between a host PC and a Qsys system on an Altera FPGA. Please find
+ details on the "Embedded Peripherals IP User Guide" of Altera.
+
+config ALTERA_JTAG_UART_BYPASS
+ bool "Bypass output when no connection"
+ depends on ALTERA_JTAG_UART
+ help
+ Bypass console output and keep going even if there is no JTAG
+ terminal connection with the host. The console output will resume
+ once the JTAG terminal is connected. Without the bypass, the console
+ output will wait forever until a JTAG terminal is connected. If you
+ not are sure, say Y.
+
+config ALTERA_UART
+ bool "Altera UART support"
+ depends on DM_SERIAL
+ help
+ Select this to enable an UART for Altera devices. Please find
+ details on the "Embedded Peripherals IP User Guide" of Altera.
+
+config SYS_NS16550
+ bool "NS16550 UART or compatible"
+ help
+ Support NS16550 UART or compatible. This can be enabled in the
+ device tree with the correct input clock frequency. If the input
+ clock frequency is not defined in the device tree, the macro
+ CONFIG_SYS_NS16550_CLK defined in a legacy board header file will
+ be used. It can be a constant or a function to get clock, eg,
+ get_serial_clock().