+
+static void _lpuart32_serial_putc(struct lpuart_serial_platdata *plat,
+ const char c)
+{
+ struct lpuart_fsl_reg32 *base = plat->reg;
+ u32 stat;
+
+ if (c == '\n')
+ serial_putc('\r');
+
+ while (true) {
+ lpuart_read32(plat->flags, &base->stat, &stat);
+
+ if ((stat & STAT_TDRE))
+ break;
+
+ WATCHDOG_RESET();
+ }
+
+ lpuart_write32(plat->flags, &base->data, c);
+}
+
+/* Test whether a character is in the RX buffer */
+static int _lpuart32_serial_tstc(struct lpuart_serial_platdata *plat)
+{
+ struct lpuart_fsl_reg32 *base = plat->reg;
+ u32 water;
+
+ lpuart_read32(plat->flags, &base->water, &water);
+
+ if ((water >> 24) == 0)
+ return 0;
+
+ return 1;
+}
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ */
+static int _lpuart32_serial_init(struct lpuart_serial_platdata *plat)
+{
+ struct lpuart_fsl_reg32 *base = (struct lpuart_fsl_reg32 *)plat->reg;
+ u32 ctrl;
+
+ lpuart_read32(plat->flags, &base->ctrl, &ctrl);
+ ctrl &= ~CTRL_RE;
+ ctrl &= ~CTRL_TE;
+ lpuart_write32(plat->flags, &base->ctrl, ctrl);
+
+ lpuart_write32(plat->flags, &base->modir, 0);
+ lpuart_write32(plat->flags, &base->fifo, ~(FIFO_TXFE | FIFO_RXFE));
+
+ lpuart_write32(plat->flags, &base->match, 0);
+
+ if (plat->devtype == DEV_MX7ULP) {
+ _lpuart32_serial_setbrg_7ulp(plat, gd->baudrate);
+ } else {
+ /* provide data bits, parity, stop bit, etc */
+ _lpuart32_serial_setbrg(plat, gd->baudrate);
+ }
+
+ lpuart_write32(plat->flags, &base->ctrl, CTRL_RE | CTRL_TE);
+
+ return 0;
+}
+
+static int lpuart_serial_setbrg(struct udevice *dev, int baudrate)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+
+ if (is_lpuart32(dev)) {
+ if (plat->devtype == DEV_MX7ULP)
+ _lpuart32_serial_setbrg_7ulp(plat, baudrate);
+ else
+ _lpuart32_serial_setbrg(plat, baudrate);
+ } else {
+ _lpuart_serial_setbrg(plat, baudrate);
+ }
+
+ return 0;
+}
+
+static int lpuart_serial_getc(struct udevice *dev)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+
+ if (is_lpuart32(dev))
+ return _lpuart32_serial_getc(plat);
+
+ return _lpuart_serial_getc(plat);
+}
+
+static int lpuart_serial_putc(struct udevice *dev, const char c)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+
+ if (is_lpuart32(dev))
+ _lpuart32_serial_putc(plat, c);
+ else
+ _lpuart_serial_putc(plat, c);
+
+ return 0;
+}
+
+static int lpuart_serial_pending(struct udevice *dev, bool input)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ struct lpuart_fsl *reg = plat->reg;
+ struct lpuart_fsl_reg32 *reg32 = plat->reg;
+ u32 stat;
+
+ if (is_lpuart32(dev)) {
+ if (input) {
+ return _lpuart32_serial_tstc(plat);
+ } else {
+ lpuart_read32(plat->flags, ®32->stat, &stat);
+ return stat & STAT_TDRE ? 0 : 1;
+ }
+ }
+
+ if (input)
+ return _lpuart_serial_tstc(plat);
+ else
+ return __raw_readb(®->us1) & US1_TDRE ? 0 : 1;
+}
+
+static int lpuart_serial_probe(struct udevice *dev)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+
+ if (is_lpuart32(dev))
+ return _lpuart32_serial_init(plat);
+ else
+ return _lpuart_serial_init(plat);
+}
+
+static int lpuart_serial_ofdata_to_platdata(struct udevice *dev)
+{
+ struct lpuart_serial_platdata *plat = dev->platdata;
+ const void *blob = gd->fdt_blob;
+ int node = dev_of_offset(dev);
+ fdt_addr_t addr;
+
+ addr = devfdt_get_addr(dev);
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ plat->reg = (void *)addr;
+ plat->flags = dev_get_driver_data(dev);
+
+ if (!fdt_node_check_compatible(blob, node, "fsl,ls1021a-lpuart"))
+ plat->devtype = DEV_LS1021A;
+ else if (!fdt_node_check_compatible(blob, node, "fsl,imx7ulp-lpuart"))
+ plat->devtype = DEV_MX7ULP;
+ else if (!fdt_node_check_compatible(blob, node, "fsl,vf610-lpuart"))
+ plat->devtype = DEV_VF610;
+
+ return 0;
+}
+
+static const struct dm_serial_ops lpuart_serial_ops = {
+ .putc = lpuart_serial_putc,
+ .pending = lpuart_serial_pending,
+ .getc = lpuart_serial_getc,
+ .setbrg = lpuart_serial_setbrg,
+};
+
+static const struct udevice_id lpuart_serial_ids[] = {
+ { .compatible = "fsl,ls1021a-lpuart", .data =
+ LPUART_FLAG_REGMAP_32BIT_REG | LPUART_FLAG_REGMAP_ENDIAN_BIG },
+ { .compatible = "fsl,imx7ulp-lpuart",
+ .data = LPUART_FLAG_REGMAP_32BIT_REG },
+ { .compatible = "fsl,vf610-lpuart"},
+ { }
+};
+
+U_BOOT_DRIVER(serial_lpuart) = {
+ .name = "serial_lpuart",
+ .id = UCLASS_SERIAL,
+ .of_match = lpuart_serial_ids,
+ .ofdata_to_platdata = lpuart_serial_ofdata_to_platdata,
+ .platdata_auto_alloc_size = sizeof(struct lpuart_serial_platdata),
+ .probe = lpuart_serial_probe,
+ .ops = &lpuart_serial_ops,
+ .flags = DM_FLAG_PRE_RELOC,
+};