- reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
- /* | AT91_WDT_WDRPROC causes processor reset only */
- | AT91_WDT_WDDBGHLT /* disabled in debug mode */
- | AT91_WDT_WDD /* restart at any time */
- | (timeout & AT91_WDT_WDV); /* timer value */
- at91_sys_write(AT91_WDT_MR, reg);
+
+ reg = AT91_WDT_MR_WDRSTEN /* causes watchdog reset */
+ | AT91_WDT_MR_WDDBGHLT /* disabled in debug mode */
+ | AT91_WDT_MR_WDD(0xfff) /* restart at any time */
+ | AT91_WDT_MR_WDV(timeout); /* timer value */
+
+ writel(reg, &wd->mr);