-/* GPIO alternate function assignments */
-#define APPS_PAD_BASE 0x40E10000
-
-/* MFPR regsiter locations for each pin */
-#define GPIO0_MFPR (APPS_PAD_BASE + 0x0124)
-#define GPIO1_MFPR (APPS_PAD_BASE + 0x0128)
-#define GPIO2_MFPR (APPS_PAD_BASE + 0x012C)
-#define GPIO3_MFPR (APPS_PAD_BASE + 0x0130)
-#define GPIO4_MFPR (APPS_PAD_BASE + 0x0134)
-#define GPIO5_MFPR (APPS_PAD_BASE + 0x028C)
-#define GPIO6_MFPR (APPS_PAD_BASE + 0x0290)
-#define GPIO7_MFPR (APPS_PAD_BASE + 0x0294)
-#define GPIO8_MFPR (APPS_PAD_BASE + 0x0298)
-#define GPIO9_MFPR (APPS_PAD_BASE + 0x029C)
-#define GPIO10_MFPR (APPS_PAD_BASE + 0x0458)
-#define GPIO11_MFPR (APPS_PAD_BASE + 0x02A0)
-#define GPIO12_MFPR (APPS_PAD_BASE + 0x02A4)
-#define GPIO13_MFPR (APPS_PAD_BASE + 0x02A8)
-#define GPIO14_MFPR (APPS_PAD_BASE + 0x02AC)
-#define GPIO15_MFPR (APPS_PAD_BASE + 0x02B0)
-#define GPIO16_MFPR (APPS_PAD_BASE + 0x02B4)
-#define GPIO17_MFPR (APPS_PAD_BASE + 0x02B8)
-#define GPIO18_MFPR (APPS_PAD_BASE + 0x02BC)
-#define GPIO19_MFPR (APPS_PAD_BASE + 0x02C0)
-#define GPIO20_MFPR (APPS_PAD_BASE + 0x02C4)
-#define GPIO21_MFPR (APPS_PAD_BASE + 0x02C8)
-#define GPIO22_MFPR (APPS_PAD_BASE + 0x02CC)
-#define GPIO23_MFPR (APPS_PAD_BASE + 0x02D0)
-#define GPIO24_MFPR (APPS_PAD_BASE + 0x02D4)
-#define GPIO25_MFPR (APPS_PAD_BASE + 0x02D8)
-#define GPIO26_MFPR (APPS_PAD_BASE + 0x02DC)
-#define GPIO27_MFPR (APPS_PAD_BASE + 0x0400)
-#define GPIO28_MFPR (APPS_PAD_BASE + 0x0404)
-#define GPIO29_MFPR (APPS_PAD_BASE + 0x0408)
-#define GPIO30_MFPR (APPS_PAD_BASE + 0x040C)
-#define GPIO31_MFPR (APPS_PAD_BASE + 0x0410)
-#define GPIO32_MFPR (APPS_PAD_BASE + 0x0414)
-#define GPIO33_MFPR (APPS_PAD_BASE + 0x0418)
-#define GPIO34_MFPR (APPS_PAD_BASE + 0x041C)
-#define GPIO35_MFPR (APPS_PAD_BASE + 0x0420)
-#define GPIO36_MFPR (APPS_PAD_BASE + 0x0424)
-#define GPIO37_MFPR (APPS_PAD_BASE + 0x0428)
-#define GPIO38_MFPR (APPS_PAD_BASE + 0x042C)
-#define GPIO39_MFPR (APPS_PAD_BASE + 0x0430)
-#define GPIO40_MFPR (APPS_PAD_BASE + 0x0434)
-#define GPIO41_MFPR (APPS_PAD_BASE + 0x0438)
-#define GPIO42_MFPR (APPS_PAD_BASE + 0x043C)
-#define GPIO43_MFPR (APPS_PAD_BASE + 0x0440)
-#define GPIO44_MFPR (APPS_PAD_BASE + 0x0444)
-#define GPIO45_MFPR (APPS_PAD_BASE + 0x0448)
-#define GPIO46_MFPR (APPS_PAD_BASE + 0x044C)
-#define GPIO47_MFPR (APPS_PAD_BASE + 0x0450)
-#define GPIO48_MFPR (APPS_PAD_BASE + 0x0454)
-#define GPIO49_MFPR (APPS_PAD_BASE + 0x045C)
-#define GPIO50_MFPR (APPS_PAD_BASE + 0x0460)
-#define GPIO51_MFPR (APPS_PAD_BASE + 0x0464)
-#define GPIO52_MFPR (APPS_PAD_BASE + 0x0468)
-#define GPIO53_MFPR (APPS_PAD_BASE + 0x046C)
-#define GPIO54_MFPR (APPS_PAD_BASE + 0x0470)
-#define GPIO55_MFPR (APPS_PAD_BASE + 0x0474)
-#define GPIO56_MFPR (APPS_PAD_BASE + 0x0478)
-#define GPIO57_MFPR (APPS_PAD_BASE + 0x047C)
-#define GPIO58_MFPR (APPS_PAD_BASE + 0x0480)
-#define GPIO59_MFPR (APPS_PAD_BASE + 0x0484)
-#define GPIO60_MFPR (APPS_PAD_BASE + 0x0488)
-#define GPIO61_MFPR (APPS_PAD_BASE + 0x048C)
-#define GPIO62_MFPR (APPS_PAD_BASE + 0x0490)
-#define GPIO63_MFPR (APPS_PAD_BASE + 0x04B4)
-#define GPIO64_MFPR (APPS_PAD_BASE + 0x04B8)
-#define GPIO65_MFPR (APPS_PAD_BASE + 0x04BC)
-#define GPIO66_MFPR (APPS_PAD_BASE + 0x04C0)
-#define GPIO67_MFPR (APPS_PAD_BASE + 0x04C4)
-#define GPIO68_MFPR (APPS_PAD_BASE + 0x04C8)
-#define GPIO69_MFPR (APPS_PAD_BASE + 0x04CC)
-#define GPIO70_MFPR (APPS_PAD_BASE + 0x04D0)
-#define GPIO71_MFPR (APPS_PAD_BASE + 0x04D4)
-#define GPIO72_MFPR (APPS_PAD_BASE + 0x04D8)
-#define GPIO73_MFPR (APPS_PAD_BASE + 0x04DC)
-#define GPIO74_MFPR (APPS_PAD_BASE + 0x04F0)
-#define GPIO75_MFPR (APPS_PAD_BASE + 0x04F4)
-#define GPIO76_MFPR (APPS_PAD_BASE + 0x04F8)
-#define GPIO77_MFPR (APPS_PAD_BASE + 0x04FC)
-#define GPIO78_MFPR (APPS_PAD_BASE + 0x0500)
-#define GPIO79_MFPR (APPS_PAD_BASE + 0x0504)
-#define GPIO80_MFPR (APPS_PAD_BASE + 0x0508)
-#define GPIO81_MFPR (APPS_PAD_BASE + 0x050C)
-#define GPIO82_MFPR (APPS_PAD_BASE + 0x0510)
-#define GPIO83_MFPR (APPS_PAD_BASE + 0x0514)
-#define GPIO84_MFPR (APPS_PAD_BASE + 0x0518)
-#define GPIO85_MFPR (APPS_PAD_BASE + 0x051C)
-#define GPIO86_MFPR (APPS_PAD_BASE + 0x0520)
-#define GPIO87_MFPR (APPS_PAD_BASE + 0x0524)
-#define GPIO88_MFPR (APPS_PAD_BASE + 0x0528)
-#define GPIO89_MFPR (APPS_PAD_BASE + 0x052C)
-#define GPIO90_MFPR (APPS_PAD_BASE + 0x0530)
-#define GPIO91_MFPR (APPS_PAD_BASE + 0x0534)
-#define GPIO92_MFPR (APPS_PAD_BASE + 0x0538)
-#define GPIO93_MFPR (APPS_PAD_BASE + 0x053C)
-#define GPIO94_MFPR (APPS_PAD_BASE + 0x0540)
-#define GPIO95_MFPR (APPS_PAD_BASE + 0x0544)
-#define GPIO96_MFPR (APPS_PAD_BASE + 0x0548)
-#define GPIO97_MFPR (APPS_PAD_BASE + 0x054C)
-#define GPIO98_MFPR (APPS_PAD_BASE + 0x0550)
-#define GPIO99_MFPR (APPS_PAD_BASE + 0x0600)
-#define GPIO100_MFPR (APPS_PAD_BASE + 0x0604)
-#define GPIO101_MFPR (APPS_PAD_BASE + 0x0608)
-#define GPIO102_MFPR (APPS_PAD_BASE + 0x060C)
-#define GPIO103_MFPR (APPS_PAD_BASE + 0x0610)
-#define GPIO104_MFPR (APPS_PAD_BASE + 0x0614)
-#define GPIO105_MFPR (APPS_PAD_BASE + 0x0618)
-#define GPIO106_MFPR (APPS_PAD_BASE + 0x061C)
-#define GPIO107_MFPR (APPS_PAD_BASE + 0x0620)
-#define GPIO108_MFPR (APPS_PAD_BASE + 0x0624)
-#define GPIO109_MFPR (APPS_PAD_BASE + 0x0628)
-#define GPIO110_MFPR (APPS_PAD_BASE + 0x062C)
-#define GPIO111_MFPR (APPS_PAD_BASE + 0x0630)
-#define GPIO112_MFPR (APPS_PAD_BASE + 0x0634)
-#define GPIO113_MFPR (APPS_PAD_BASE + 0x0638)
-#define GPIO114_MFPR (APPS_PAD_BASE + 0x063C)
-#define GPIO115_MFPR (APPS_PAD_BASE + 0x0640)
-#define GPIO116_MFPR (APPS_PAD_BASE + 0x0644)
-#define GPIO117_MFPR (APPS_PAD_BASE + 0x0648)
-#define GPIO118_MFPR (APPS_PAD_BASE + 0x064C)
-#define GPIO119_MFPR (APPS_PAD_BASE + 0x0650)
-#define GPIO120_MFPR (APPS_PAD_BASE + 0x0654)
-#define GPIO121_MFPR (APPS_PAD_BASE + 0x0658)
-#define GPIO122_MFPR (APPS_PAD_BASE + 0x065C)
-#define GPIO123_MFPR (APPS_PAD_BASE + 0x0660)
-#define GPIO124_MFPR (APPS_PAD_BASE + 0x0664)
-#define GPIO125_MFPR (APPS_PAD_BASE + 0x0668)
-#define GPIO126_MFPR (APPS_PAD_BASE + 0x066C)
-#define GPIO127_MFPR (APPS_PAD_BASE + 0x0670)
-#define GPIO0_2_MFPR (APPS_PAD_BASE + 0x0674) /* MFPR for GPIO0_2 */
-#define GPIO1_2_MFPR (APPS_PAD_BASE + 0x0678) /* MFPR for GPIO1_2 */
-#define GPIO2_2_MFPR (APPS_PAD_BASE + 0x067C) /* MFPR for GPIO2_2 */
-#define GPIO3_2_MFPR (APPS_PAD_BASE + 0x0680) /* MFPR for GPIO3_2 */
-#define GPIO4_2_MFPR (APPS_PAD_BASE + 0x0684) /* MFPR for GPIO4_2 */
-#define GPIO5_2_MFPR (APPS_PAD_BASE + 0x0688) /* MFPR for GPIO5_2 */
-#define GPIO6_2_MFPR (APPS_PAD_BASE + 0x0494) /* MFPR for GPIO6_2 */
-#define GPIO7_2_MFPR (APPS_PAD_BASE + 0x0498) /* MFPR for GPIO7_2 */
-#define GPIO8_2_MFPR (APPS_PAD_BASE + 0x049C) /* MFPR for GPIO8_2 */
-#define GPIO9_2_MFPR (APPS_PAD_BASE + 0x04A0) /* MFPR for GPIO9_2 */
-#define GPIO10_2_MFPR (APPS_PAD_BASE + 0x04A4) /* MFPR for GPIO10_2 */
-#define GPIO11_2_MFPR (APPS_PAD_BASE + 0x04A8) /* MFPR for GPIO11_2 */
-#define GPIO12_2_MFPR (APPS_PAD_BASE + 0x04AC) /* MFPR for GPIO12_2 */
-#define GPIO13_2_MFPR (APPS_PAD_BASE + 0x04B0) /* MFPR for GPIO13_2 */
-#define GPIO14_2_MFPR (APPS_PAD_BASE + 0x04E0) /* MFPR for GPIO14_2 */
-#define GPIO15_2_MFPR (APPS_PAD_BASE + 0x04E4) /* MFPR for GPIO15_2 */
-#define GPIO16_2_MFPR (APPS_PAD_BASE + 0x04E8) /* MFPR for GPIO16_2 */
-#define GPIO17_2_MFPR (APPS_PAD_BASE + 0x04EC) /* MFPR for GPIO17_2 */
-
-#define PIN_nXCVREN_MFPR (APPS_PAD_BASE + 0x0138)
-#define PIN_ND_CLE_MFPR (APPS_PAD_BASE + 0x0204)
-#define PIN_DF_nADV1_ALE_MFPR (APPS_PAD_BASE + 0x0208)
-#define PIN_DF_SCLK_S_MFPR (APPS_PAD_BASE + 0x020C)
-#define PIN_DF_SCLK_E_MFPR (APPS_PAD_BASE + 0x0210)
-#define PIN_nBE0_MFPR (APPS_PAD_BASE + 0x0214)
-#define PIN_nBE1_MFPR (APPS_PAD_BASE + 0x0218)
-#define PIN_DF_nADV2_ALE_MFPR (APPS_PAD_BASE + 0x021C)
-#define PIN_DF_INT_RnB_MFPR (APPS_PAD_BASE + 0x0220)
-#define PIN_DF_nCS0_MFPR (APPS_PAD_BASE + 0x0224)
-#define PIN_DF_nCS1_MFPR (APPS_PAD_BASE + 0x0228)
-#define PIN_DF_nWE_MFPR (APPS_PAD_BASE + 0x022C)
-#define PIN_DF_nRE_nOE_MFPR (APPS_PAD_BASE + 0x0230)
-#define PIN_nLUA_MFPR (APPS_PAD_BASE + 0x0234)
-#define PIN_nLLA_MFPR (APPS_PAD_BASE + 0x0238)
-#define PIN_DF_ADDR0_MFPR (APPS_PAD_BASE + 0x023C)
-#define PIN_DF_ADDR1_MFPR (APPS_PAD_BASE + 0x0240)
-#define PIN_DF_ADDR2_MFPR (APPS_PAD_BASE + 0x0244)
-#define PIN_DF_ADDR3_MFPR (APPS_PAD_BASE + 0x0248)
-#define PIN_DF_IO0_MFPR (APPS_PAD_BASE + 0x024C)
-#define PIN_DF_IO1_MFPR (APPS_PAD_BASE + 0x0254)
-#define PIN_DF_IO2_MFPR (APPS_PAD_BASE + 0x025C)
-#define PIN_DF_IO3_MFPR (APPS_PAD_BASE + 0x0264)
-#define PIN_DF_IO4_MFPR (APPS_PAD_BASE + 0x026C)
-#define PIN_DF_IO5_MFPR (APPS_PAD_BASE + 0x0274)
-#define PIN_DF_IO6_MFPR (APPS_PAD_BASE + 0x027C)
-#define PIN_DF_IO7_MFPR (APPS_PAD_BASE + 0x0294)
-#define PIN_DF_IO8_MFPR (APPS_PAD_BASE + 0x0298)
-#define PIN_DF_IO9_MFPR (APPS_PAD_BASE + 0x029C)
-#define PIN_DF_IO10_MFPR (APPS_PAD_BASE + 0x0260)
-#define PIN_DF_IO11_MFPR (APPS_PAD_BASE + 0x0268)
-#define PIN_DF_IO12_MFPR (APPS_PAD_BASE + 0x0270)
-#define PIN_DF_IO13_MFPR (APPS_PAD_BASE + 0x0278)
-#define PIN_DF_IO14_MFPR (APPS_PAD_BASE + 0x0280)
-#define PIN_DF_IO15_MFPR (APPS_PAD_BASE + 0x0288)
-
-/* GPIO mode encodings: Direction, Number, MFPR value */
-
-#define MFPR_PS 0x80000000 /* MFPR bit 15: pull_sel */
-#define MFPR_PUE 0x40000000 /* MFPR bit 14: pullup_en */
-#define MFPR_PDE 0x20000000 /* MFPR bit 13: pulldown_en */
-#define MFPR_DF1 0x00000000 /* MFPR bit 12-10: drive, fast 1ma */
-#define MFPR_DF2 0x04000000 /* MFPR bit 12-10: drive, fast 2ma */
-#define MFPR_DF3 0x08000000 /* MFPR bit 12-10: drive, fast 3ma */
-#define MFPR_DF4 0x0c000000 /* MFPR bit 12-10: drive, fast 4ma */
-#define MFPR_DS6 0x10000000 /* MFPR bit 12-10: drive, slow 6ma */
-#define MFPR_DF6 0x14000000 /* MFPR bit 12-10: drive, fast 6ma */
-#define MFPR_DS10 0x18000000 /* MFPR bit 12-10: drive, slow 10ma */
-#define MFPR_DF10 0x1c000000 /* MFPR bit 12-10: drive, fast 10ma */
-#define MFPR_SS 0x02000000 /* MFPR bit 9: sleep_sel */
-#define MFPR_SD 0x01000000 /* MFPR bit 8: sleep_data */
-#define MFPR_SE 0x00800000 /* MFPR bit 7: sleep_oe */
-#define MFPR_EC 0x00400000 /* MFPR bit 6: edge_clear */
-#define MFPR_EF 0x00200000 /* MFPR bit 5: edge_fall_en */
-#define MFPR_ER 0x00100000 /* MFPR bit 4: edge_rise_en */
-#define MFPR_ALT0 0x00000000 /* MFPR bit 2-0: alternate function 0 */
-#define MFPR_ALT1 0x00010000 /* MFPR bit 2-0: alternate function 1 */
-#define MFPR_ALT2 0x00020000 /* MFPR bit 2-0: alternate function 2 */
-#define MFPR_ALT3 0x00030000 /* MFPR bit 2-0: alternate function 3 */
-#define MFPR_ALT4 0x00040000 /* MFPR bit 2-0: alternate function 4 */
-#define MFPR_ALT5 0x00050000 /* MFPR bit 2-0: alternate function 5 */
-#define MFPR_ALT6 0x00060000 /* MFPR bit 2-0: alternate function 6 */
-#define MFPR_ALT7 0x00070000 /* MFPR bit 2-0: alternate function 7 */
-#define GPIO_MD_MASK_NR 0x0000ffff
-#define GPIO_MD_MASK_MFPR 0xffff0000
-#define GPIO_MD_SHIFT_MFPR 16
-
-#define GPIO3_NCS_2 (3|MFPR_DS6|MFPR_ALT1)
-#define GPIO11_PWM0 (11|MFPR_DS6|MFPR_ALT1)
-#define GPIO12_PWM1 (12|MFPR_DS6|MFPR_ALT1)
-#define GPIO14_LCD_BACKLIGHT_PWM3 (14|MFPR_DS6|MFPR_ALT1)
-
-#define GPIO18_MMC_DAT_0 (18|MFPR_DS6|MFPR_ALT4)
-#define GPIO19_MMC_DAT_1 (19|MFPR_DS6|MFPR_ALT4)
-#define GPIO20_MMC_DAT_2 (20|MFPR_DS6|MFPR_ALT4)
-#define GPIO21_MMC_DAT_3 (21|MFPR_DS6|MFPR_ALT4)
-#define GPIO22_CLK_MMC (22|MFPR_DS6|MFPR_ALT4)
-#define GPIO23_MMC_CMD (23|MFPR_DS6|MFPR_ALT4)
-#define GPIO24_MMC2_DAT_0 (24|MFPR_DS6|MFPR_ALT4)
-#define GPIO25_MMC2_DAT_1 (25|MFPR_DS6|MFPR_ALT4)
-#define GPIO26_MMC2_DAT_2 (26|MFPR_DS6|MFPR_ALT4)
-#define GPIO27_MMC2_DAT_3 (27|MFPR_DS6|MFPR_ALT4)
-#define GPIO28_CLK_MMC2 (28|MFPR_DS6|MFPR_ALT4)
-#define GPIO29_MMC2_CMD (29|MFPR_DS6|MFPR_ALT4)
-#define GPIO30_CLK_MMC (30|MFPR_DS6|MFPR_ALT4)
-#define GPIO31_MMC_CMD (31|MFPR_DS6|MFPR_ALT4)
-#define GPIO34_AC97_SYSCLK (34|MFPR_DF6|MFPR_ALT1)
-#define GPIO35_AC97_SDATA_IN0 (35|MFPR_DF6|MFPR_ALT1)
-#define GPIO36_AC97_SDATA_IN1 (36|MFPR_DF6|MFPR_ALT1)
-#define GPIO37_AC97_SDATA_OUT (37|MFPR_DF6|MFPR_ALT1)
-#define GPIO38_AC97_SYNC (38|MFPR_DF6|MFPR_ALT1)
-#define GPIO39_AC97_BITCLK (39|MFPR_DF6|MFPR_ALT1)
-#define GPIO40_AC97_RESET_N (40|MFPR_DF6|MFPR_ALT1)
-#define GPIO41_FF_UART1_RXD (41|MFPR_DS6|MFPR_ALT2)
-#define GPIO42_FF_UART1_TXD (42|MFPR_DS6|MFPR_ALT2)
-#define GPIO43_FF_UART1_CTS (43|MFPR_DS6|MFPR_ALT2)
-#define GPIO44_FF_UART1_DCD (44|MFPR_DF10|MFPR_SD|MFPR_ALT2)
-#define GPIO45_FF_UART1_DSR (45|MFPR_DS6|MFPR_ALT2)
-#define GPIO46_FF_UART1_RI (46|MFPR_DS6|MFPR_ALT2)
-#define GPIO47_FF_UART1_DTR (47|MFPR_DS6|MFPR_ALT2)
-#define GPIO48_FF_UART1_RTS (48|MFPR_DS6|MFPR_ALT2)
-#define GPIO49_CIF_DD0 (49|MFPR_DF6|MFPR_ALT1)
-#define GPIO50_CIF_DD1 (50|MFPR_DF6|MFPR_ALT1)
-#define GPIO51_CIF_DD2 (51|MFPR_DF6|MFPR_ALT1)
-#define GPIO52_CIF_DD3 (52|MFPR_DF6|MFPR_ALT1)
-#define GPIO53_CIF_DD4 (53|MFPR_DF6|MFPR_ALT1)
-#define GPIO54_CIF_DD5 (54|MFPR_DF6|MFPR_ALT1)
-#define GPIO55_CIF_DD6 (55|MFPR_DF6|MFPR_ALT1)
-#define GPIO56_CIF_DD7 (56|MFPR_DF6|MFPR_ALT1)
-#define GPIO57_CIF_DD8 (57|MFPR_DF6|MFPR_ALT1)
-#define GPIO58_CIF_DD9 (58|MFPR_DF6|MFPR_ALT1)
-#define GPIO59_CIF_MCLK (59|MFPR_DF6|MFPR_ALT1)
-#define GPIO60_CIF_PCLK (60|MFPR_DF6|MFPR_ALT1)
-#define GPIO61_CIF_LV (61|MFPR_DF6|MFPR_ALT1)
-#define GPIO62_CIF_FV (62|MFPR_DF6|MFPR_ALT1)
-#define GPIO63_LCD_LDD_8 (63|MFPR_DF6|MFPR_ALT1)
-#define GPIO64_LCD_LDD_9 (64|MFPR_DF6|MFPR_ALT1)
-#define GPIO65_LCD_LDD_10 (65|MFPR_DF6|MFPR_ALT1)
-#define GPIO66_LCD_LDD_11 (66|MFPR_DF6|MFPR_ALT1)
-#define GPIO67_LCD_LDD_12 (67|MFPR_DF6|MFPR_ALT1)
-#define GPIO68_LCD_LDD_13 (68|MFPR_DF6|MFPR_ALT1)
-#define GPIO69_LCD_LDD_14 (69|MFPR_DF6|MFPR_ALT1)
-#define GPIO70_LCD_LDD_15 (70|MFPR_DF6|MFPR_ALT1)
-#define GPIO71_LCD_LDD_16 (71|MFPR_DF6|MFPR_ALT1)
-#define GPIO72_LCD_LDD_17 (72|MFPR_DF6|MFPR_ALT1)
-#define GPIO73_LCD_CS (73|MFPR_DF6|MFPR_ALT2)
-#define GPIO74_LCD_VSYNC (74|MFPR_DF6|MFPR_ALT2)
-#define GPIO89_SSP3_SCLK (89|MFPR_DS6|MFPR_ALT1)
-#define GPIO90_SSP3_SFRM (90|MFPR_DS6|MFPR_ALT1)
-#define GPIO91_SSP3_TXD (91|MFPR_DS6|MFPR_ALT1)
-#define GPIO92_SSP3_RXD (92|MFPR_DS6|MFPR_ALT1)
-#define GPIO93_SSP4_SCLK (93|MFPR_DS6|MFPR_ALT1)
-#define GPIO94_SSP4_SFRM (94|MFPR_DS6|MFPR_ALT1)
-#define GPIO95_SSP4_TXD (95|MFPR_DS6|MFPR_ALT1)
-#define GPIO96_SSP4_RXD (96|MFPR_DS6|MFPR_ALT1)
-#define GPIO100_USB_P2_4 (100|MFPR_DS6|MFPR_ALT2)
-#define GPIO101_USB_P2_8 (101|MFPR_DS6|MFPR_ALT2)
-#define GPIO102_USB_P2_3 (102|MFPR_DS6|MFPR_ALT2)
-#define GPIO103_USB_P2_5 (103|MFPR_DS6|MFPR_ALT2)
-#define GPIO104_USB_P2_7 (104|MFPR_DS6|MFPR_ALT2)
-#define GPIO105_KP_DKIN_0 (105|MFPR_DS6|MFPR_ALT2)
-#define GPIO106_KP_DKIN_1 (106|MFPR_DS6|MFPR_ALT2)
-#define GPIO107_STD_UART3_TXD (107|MFPR_DS6|MFPR_ALT1)
-#define GPIO108_STD_UART3_RXD (108|MFPR_DS6|MFPR_ALT1)
-#define GPIO109_BT_UART2_RTS (109|MFPR_DS6|MFPR_ALT1)
-#define GPIO110_BT_UART2_RXD (110|MFPR_DS6|MFPR_ALT1)
-#define GPIO111_BT_UART2_TXD (111|MFPR_DS6|MFPR_ALT1)
-#define GPIO112_BT_UART2_CTS (112|MFPR_DS6|MFPR_ALT1)
-#define GPIO113_KP_MKIN_0 (113|MFPR_DS6|MFPR_ALT1)
-#define GPIO114_KP_MKIN_1 (114|MFPR_DS6|MFPR_ALT1)
-#define GPIO115_KP_MKIN_2 (115|MFPR_DS6|MFPR_ALT1)
-#define GPIO116_KP_MKIN_3 (116|MFPR_DS6|MFPR_ALT1)
-#define GPIO117_KP_MKIN_4 (117|MFPR_DS6|MFPR_ALT1)
-#define GPIO118_KP_MKIN_5 (118|MFPR_DS6|MFPR_ALT1)
-#define GPIO119_KP_MKIN_6 (119|MFPR_DS6|MFPR_ALT1)
-#define GPIO120_KP_MKIN_7 (120|MFPR_DS6|MFPR_ALT1)
-#define GPIO121_KP_MKOUT_0 (121|MFPR_DS6|MFPR_ALT1)
-#define GPIO122_KP_MKOUT_1 (122|MFPR_DS6|MFPR_ALT1)
-#define GPIO123_KP_MKOUT_2 (123|MFPR_DS6|MFPR_ALT1)
-#define GPIO124_KP_MKOUT_3 (124|MFPR_DS6|MFPR_ALT1)
-#define GPIO125_KP_MKOUT_4 (125|MFPR_DS6|MFPR_ALT1)
-#define GPIO126_KP_MKOUT_5 (126|MFPR_DS6|MFPR_ALT1)
-#define GPIO127_KP_MKOUT_6 (127|MFPR_DS6|MFPR_ALT1)
-#define GPIO5_2_KP_MKOUT_7 (133|MFPR_DS6|MFPR_ALT1)
-#define GPIO6_2_LCD_LDD_0 (134|MFPR_DS6|MFPR_ALT1)
-#define GPIO7_2_LCD_LDD_1 (135|MFPR_DS6|MFPR_ALT1)
-#define GPIO8_2_LCD_LDD_2 (136|MFPR_DS6|MFPR_ALT1)
-#define GPIO9_2_LCD_LDD_3 (137|MFPR_DS6|MFPR_ALT1)
-#define GPIO10_2_LCD_LDD_4 (138|MFPR_DS6|MFPR_ALT1)
-#define GPIO11_2_LCD_LDD_5 (139|MFPR_DS6|MFPR_ALT1)
-#define GPIO12_2_LCD_LDD_6 (140|MFPR_DS6|MFPR_ALT1)
-#define GPIO13_2_LCD_LDD_7 (141|MFPR_DS6|MFPR_ALT1)
-#define GPIO14_2_LCD_FCLK (142|MFPR_DS6|MFPR_ALT1)
-#define GPIO15_2_LCD_LCLK (143|MFPR_DS6|MFPR_ALT1)
-#define GPIO16_2_LCD_PCLK (144|MFPR_DS6|MFPR_ALT1)
-#define GPIO17_2_LCD_BIAS (145|MFPR_DS6|MFPR_ALT1)
-
-/* Internal System Bus Arbiter */
-#define ARB_CNTRL1 __REG_2(0x4600FE00) /* PX1 Bus Arbiter Control Register */
-#define ARB_CNTRL2 __REG_2(0x4600FE80) /* PX2 Bus Arbiter Control Register */