+/*
+ * QSPI support
+ */
+#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */
+#define CONFIG_CADENCE_QSPI
+/* Enable multiple SPI NOR flash manufacturers */
+#define CONFIG_SPI_FLASH_STMICRO /* Micron/Numonyx flash */
+#define CONFIG_SPI_FLASH_SPANSION /* Spansion flash */
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SPI_FLASH_MTD
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define MTDIDS_DEFAULT "nor0=ff705000.spi"
+#endif
+/* QSPI reference clock */
+#ifndef __ASSEMBLY__
+unsigned int cm_get_qspi_controller_clk_hz(void);
+#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz()
+#endif
+#define CONFIG_CQSPI_DECODER 0
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH_BAR
+#endif
+
+#if CONFIG_IS_ENABLED(OF_CONTROL) /* DW SPI is controlled via DT */
+#define CONFIG_DESIGNWARE_SPI
+#define CONFIG_CMD_SPI
+#endif
+