- .import __SHADOW_RAM_LOAD__, __SHADOW_RAM_SIZE__
- .import __SHADOW_RAM_RUN__
- .import __CHARGEN_START__, __CHARGEN_SIZE__
- .import __SAVEAREA_LOAD__
- .import zpsave
+ .import __SHADOW_RAM_LOAD__, __SHADOW_RAM_SIZE__
+ .import __SHADOW_RAM_RUN__
+ .import __CHARGEN_START__, __CHARGEN_SIZE__
+ .import __SAVEAREA_LOAD__
- .local start, cont
- jmp cont
-start: .byte text, ATEOL
-cont: ldx #0 ; channel 0
- lda #<start
- sta ICBAL,x ; address
- lda #>start
- sta ICBAH,x
- lda #<(cont - start)
- sta ICBLL,x ; length
- lda #>(cont - start)
- sta ICBLH,x
- lda #PUTCHR
- sta ICCOM,x
- jsr CIOV_org
+ .local start, cont
+ jmp cont
+start: .byte text, ATEOL
+cont: ldx #0 ; channel 0
+ lda #<start
+ sta ICBAL,x ; address
+ lda #>start
+ sta ICBAH,x
+ lda #<(cont - start)
+ sta ICBLL,x ; length
+ lda #>(cont - start)
+ sta ICBLH,x
+ lda #PUTCHR
+ sta ICCOM,x
+ jsr CIOV_org
-
-; ... issue a GRAPHICS 0 call (copied'n'pasted from TGI drivers)
-
-
- ldx #$50 ; take any IOCB, hopefully free (@@@ fixme)
+ jsr findfreeiocb
+.ifdef DEBUG ; only check in debug version, this shouldn't really happen(tm)
+ beq iocbok
+ print_string "Internal error, no free IOCB!"
+ jsr delay
+ jsr delay
+ jsr delay
+ jsr restore ; restore stuff we've changed
+ jmp (DOSVEC) ; abort loading
+iocbok:
+.endif
- jmp (DOSVEC) ; abort loading
+; shouldn't happen(tm)
+ print_string "Internal error, aborting..."
+ jsr delay
+ jsr delay
+ jsr delay
+ jsr restore ; restore stuff we've changed
+ jmp (DOSVEC) ; abort loading
- ; page align the new chargen address
- inc ptr3+1
- lda #0
- sta ptr3
+ lda #>(__SRPREP_LOAD__ + __SRPREP_SIZE__ + __SHADOW_RAM_SIZE__)
+ sta ptr3+1
+ lda #<(__SRPREP_LOAD__ + __SRPREP_SIZE__ + __SHADOW_RAM_SIZE__)
+ sta ptr3
+ beq cg_addr_ok
+
+ ; page align the new chargen address
+ inc ptr3+1
+ lda #0
+ sta ptr3
- lda #<DCSORG
- sta ptr1
- lda #>DCSORG
- sta ptr1+1
- lda ptr3
- sta ptr2
- lda ptr3+1
- sta ptr2+1
- lda #>__CHARGEN_SIZE__
- sta tmp2
- lda #<__CHARGEN_SIZE__
- sta tmp2+1
- jsr memcopy
-
-; TODO: switch to this temp. chargen
-
-; disable ROMs
- sei
- ldx #0
- stx NMIEN ; disable NMI
- lda PORTB
- and #$fe
- sta PORTB ; now ROM is mapped out
+
+ lda ptr3+1
+ and #3
+ beq cg_addr_ok2
+
+ ; align to next 1K boundary
+ lda ptr3+1
+ and #$fc
+ clc
+ adc #4
+ sta ptr3+1
+
+cg_addr_ok2:
+
+ lda #<DCSORG
+ sta ptr1
+ lda #>DCSORG
+ sta ptr1+1
+ lda ptr3
+ sta ptr2
+ lda ptr3+1
+ pha ; needed later to set CHBAS/CHBASE
+ sta ptr2+1
+ lda #>__CHARGEN_SIZE__
+ sta tmp2
+ lda #<__CHARGEN_SIZE__
+ sta tmp1
+ jsr memcopy
+
+.ifdef DEBUG
+ print_string "now setting up high memory"
+.endif
+
+; disable ROM
+ sei
+ ldx #0
+ stx NMIEN ; disable NMI
+ lda PORTB
+ and #$fe
+ tax
+ pla ; get temp. chargen address
+ sta WSYNC ; wait for horiz. retrace
+ stx PORTB ; now ROM is mapped out
+
+; switch to temporary chargen
+
+ sta CHBASE
+ sta CHBAS
- lda #<__SHADOW_RAM_SIZE__
- bne do_copy
- lda #>__SHADOW_RAM_SIZE__
- beq no_copy ; we have no shadow RAM contents
-
- ; ptr1 - src; ptr2 - dest; tmp1, tmp2 - len
-do_copy:lda #<__SHADOW_RAM_LOAD__
- sta ptr1
- lda #>__SHADOW_RAM_LOAD__
- sta ptr1+1
- lda #<__SHADOW_RAM_RUN__
- sta ptr2
- lda #>__SHADOW_RAM_RUN__
- sta ptr2+1
- lda #<__SHADOW_RAM_SIZE__
- sta tmp1
- lda #>__SHADOW_RAM_SIZE__
- sta tmp2
-
- jsr memcopy
+ lda #<__SHADOW_RAM_SIZE__
+ bne do_copy
+ lda #>__SHADOW_RAM_SIZE__
+ beq no_copy ; we have no shadow RAM contents
+
+ ; ptr1 - src; ptr2 - dest; tmp1, tmp2 - len
+do_copy:lda #<__SHADOW_RAM_LOAD__
+ sta ptr1
+ lda #>__SHADOW_RAM_LOAD__
+ sta ptr1+1
+ lda #<__SHADOW_RAM_RUN__
+ sta ptr2
+ lda #>__SHADOW_RAM_RUN__
+ sta ptr2+1
+ lda #<__SHADOW_RAM_SIZE__
+ sta tmp1
+ lda #>__SHADOW_RAM_SIZE__
+ sta tmp2
+
+ jsr memcopy
-; copy chargen to its new location
-
- lda ptr3
- sta ptr1
- lda ptr3+1
- sta ptr1+1
- lda #<__CHARGEN_START__
- sta ptr2
- lda #>__CHARGEN_START__
- sta ptr2+1
- lda #>__CHARGEN_SIZE__
- sta tmp2
- lda #<__CHARGEN_SIZE__
- sta tmp2+1
- jsr memcopy
+; copy chargen to its new (final) location
+
+ lda ptr3
+ sta ptr1
+ lda ptr3+1
+ sta ptr1+1
+ lda #<__CHARGEN_START__
+ sta ptr2
+ lda #>__CHARGEN_START__
+ sta ptr2+1
+ lda #>__CHARGEN_SIZE__
+ sta tmp2
+ lda #<__CHARGEN_SIZE__
+ sta tmp1
+ jsr memcopy
- lda PORTB
- ora #1
- sta PORTB
- lda #$40
- sta NMIEN ; enable VB again
- cli ; and enable IRQs
-
+ lda PORTB
+ ora #1
+ ldx #>DCSORG
+ sta WSYNC ; wait for horiz. retrace
+ sta PORTB
+ stx CHBASE
+ stx CHBAS
+ lda #$40
+ sta NMIEN ; enable VB again
+ cli ; and enable IRQs
+
+.ifdef DEBUG
+ print_string "Stage #2 OK"
+ print_string "loading main chunk"
+ jsr delay
+.endif
; ------------------------------------------------------------------------
; Provide an empty SHADOW_RAM segment in order that the linker is happy
; ------------------------------------------------------------------------
; Provide an empty SHADOW_RAM segment in order that the linker is happy