- break;
-
- case '#':
- /* Immidiate */
- StrCopy (Arg, sizeof (Arg), L+1);
- AM = AM65_IMM;
- break;
-
- case '(':
- /* Indirect */
- L = ReadToken (L+1, ",)", Arg, sizeof (Arg));
-
- /* Check for errors */
- if (*L == '\0') {
- Error ("ASM code error: syntax error");
- return 0;
- }
-
- /* Check the different indirect modes */
- if (*L == ',') {
- /* Expect zp x indirect */
- L = SkipSpace (L+1);
- if (toupper (*L) != 'X') {
- Error ("ASM code error: `X' expected");
- return 0;
- }
- L = SkipSpace (L+1);
- if (*L != ')') {
- Error ("ASM code error: `)' expected");
- return 0;
- }
- L = SkipSpace (L+1);
- if (*L != '\0') {
- Error ("ASM code error: syntax error");
- return 0;
- }
- AM = AM65_ZPX_IND;
- } else if (*L == ')') {
- /* zp indirect or zp indirect, y */
- L = SkipSpace (L+1);
- if (*L == ',') {
- L = SkipSpace (L+1);
- if (toupper (*L) != 'Y') {
- Error ("ASM code error: `Y' expected");
- return 0;
- }
- L = SkipSpace (L+1);
- if (*L != '\0') {
- Error ("ASM code error: syntax error");
- return 0;
- }
- AM = AM65_ZP_INDY;
- } else if (*L == '\0') {
- AM = AM65_ZP_IND;
- } else {
- Error ("ASM code error: syntax error");
- return 0;
- }
- }
- break;
-
- case 'a':
- case 'A':
- /* Accumulator? */
- if (L[1] == '\0') {
- AM = AM65_ACC;
- break;
- }
- /* FALLTHROUGH */
-
- default:
- /* Absolute, maybe indexed */
- L = ReadToken (L, ",", Arg, sizeof (Arg));
- if (*L == '\0') {
- /* Absolute, zeropage or branch */
- if ((OPC->Info & OF_BRA) != 0) {
- /* Branch */
- AM = AM65_BRA;
- } else if (GetZPInfo(Arg) != 0) {
- AM = AM65_ZP;
- } else {
+ break;
+
+ case '#':
+ /* Immidiate */
+ StrCopy (Arg, sizeof (Arg), L+1);
+ AM = AM65_IMM;
+ break;
+
+ case '(':
+ /* Indirect */
+ L = ReadToken (L+1, ",)", Arg, sizeof (Arg));
+
+ /* Check for errors */
+ if (*L == '\0') {
+ Error ("ASM code error: syntax error");
+ return 0;
+ }
+
+ /* Check the different indirect modes */
+ if (*L == ',') {
+ /* Expect zp x indirect */
+ L = SkipSpace (L+1);
+ if (toupper (*L) != 'X') {
+ Error ("ASM code error: `X' expected");
+ return 0;
+ }
+ L = SkipSpace (L+1);
+ if (*L != ')') {
+ Error ("ASM code error: `)' expected");
+ return 0;
+ }
+ L = SkipSpace (L+1);
+ if (*L != '\0') {
+ Error ("ASM code error: syntax error");
+ return 0;
+ }
+ AM = AM65_ZPX_IND;
+ } else if (*L == ')') {
+ /* zp indirect or zp indirect, y */
+ L = SkipSpace (L+1);
+ if (*L == ',') {
+ L = SkipSpace (L+1);
+ if (toupper (*L) != 'Y') {
+ Error ("ASM code error: `Y' expected");
+ return 0;
+ }
+ L = SkipSpace (L+1);
+ if (*L != '\0') {
+ Error ("ASM code error: syntax error");
+ return 0;
+ }
+ AM = AM65_ZP_INDY;
+ } else if (*L == '\0') {
+ AM = AM65_ZP_IND;
+ } else {
+ Error ("ASM code error: syntax error");
+ return 0;
+ }
+ }
+ break;
+
+ case 'a':
+ case 'A':
+ /* Accumulator? */
+ if (L[1] == '\0') {
+ AM = AM65_ACC;
+ break;
+ }
+ /* FALLTHROUGH */
+
+ default:
+ /* Absolute, maybe indexed */
+ L = ReadToken (L, ",", Arg, sizeof (Arg));
+ if (*L == '\0') {
+ /* Absolute, zeropage or branch */
+ if ((OPC->Info & OF_BRA) != 0) {
+ /* Branch */
+ AM = AM65_BRA;
+ } else if (GetZPInfo(Arg) != 0) {
+ AM = AM65_ZP;
+ } else {
- CodeLabel* RefLab;
- unsigned J;
-
- /* Get a pointer to the next entry */
- CodeEntry* E = CS_GetEntry (S, I);
-
- /* If this entry has zero labels, continue with the next one */
- unsigned LabelCount = CE_GetLabelCount (E);
- if (LabelCount == 0) {
- continue;
- }
-
- /* We have at least one label. Use the first one as reference label. */
- RefLab = CE_GetLabel (E, 0);
-
- /* Walk through the remaining labels and change references to these
- * labels to a reference to the one and only label. Delete the labels
- * that are no longer used. To increase performance, walk backwards
- * through the list.
- */
- for (J = LabelCount-1; J >= 1; --J) {
-
- /* Get the next label */
- CodeLabel* L = CE_GetLabel (E, J);
-
- /* Move all references from this label to the reference label */
- CL_MoveRefs (L, RefLab);
-
- /* Remove the label completely. */
- CS_DelLabel (S, L);
- }
-
- /* The reference label is the only remaining label. Check if there
- * are any references to this label, and delete it if this is not
- * the case.
- */
- if (CollCount (&RefLab->JumpFrom) == 0) {
- /* Delete the label */
- CS_DelLabel (S, RefLab);
- }
+ CodeLabel* RefLab;
+ unsigned J;
+
+ /* Get a pointer to the next entry */
+ CodeEntry* E = CS_GetEntry (S, I);
+
+ /* If this entry has zero labels, continue with the next one */
+ unsigned LabelCount = CE_GetLabelCount (E);
+ if (LabelCount == 0) {
+ continue;
+ }
+
+ /* We have at least one label. Use the first one as reference label. */
+ RefLab = CE_GetLabel (E, 0);
+
+ /* Walk through the remaining labels and change references to these
+ * labels to a reference to the one and only label. Delete the labels
+ * that are no longer used. To increase performance, walk backwards
+ * through the list.
+ */
+ for (J = LabelCount-1; J >= 1; --J) {
+
+ /* Get the next label */
+ CodeLabel* L = CE_GetLabel (E, J);
+
+ /* Move all references from this label to the reference label */
+ CL_MoveRefs (L, RefLab);
+
+ /* Remove the label completely. */
+ CS_DelLabel (S, L);
+ }
+
+ /* The reference label is the only remaining label. Check if there
+ * are any references to this label, and delete it if this is not
+ * the case.
+ */
+ if (CollCount (&RefLab->JumpFrom) == 0) {
+ /* Delete the label */
+ CS_DelLabel (S, RefLab);
+ }
- /* Assume we're done after this run */
- Done = 1;
-
- /* On entry, the register contents are unknown */
- RC_Invalidate (&Regs);
- CurrentRegs = &Regs;
-
- /* Walk over all insns and note just the changes from one insn to the
- * next one.
- */
- WasJump = 0;
- for (I = 0; I < CS_GetEntryCount (S); ++I) {
-
- CodeEntry* P;
-
- /* Get the next instruction */
- CodeEntry* E = CollAtUnchecked (&S->Entries, I);
-
- /* If the instruction has a label, we need some special handling */
- unsigned LabelCount = CE_GetLabelCount (E);
- if (LabelCount > 0) {
-
- /* Loop over all entry points that jump here. If these entry
- * points already have register info, check if all values are
- * known and identical. If all values are identical, and the
- * preceeding instruction was not an unconditional branch, check
- * if the register value on exit of the preceeding instruction
- * is also identical. If all these values are identical, the
- * value of a register is known, otherwise it is unknown.
- */
- CodeLabel* Label = CE_GetLabel (E, 0);
- unsigned Entry;
- if (WasJump) {
- /* Preceeding insn was an unconditional branch */
- CodeEntry* J = CL_GetRef(Label, 0);
- if (J->RI) {
- Regs = J->RI->Out2;
- } else {
- RC_Invalidate (&Regs);
- }
- Entry = 1;
- } else {
- Regs = *CurrentRegs;
- Entry = 0;
- }
-
- while (Entry < CL_GetRefCount (Label)) {
- /* Get this entry */
- CodeEntry* J = CL_GetRef (Label, Entry);
- if (J->RI == 0) {
- /* No register info for this entry. This means that the
- * instruction that jumps here is at higher addresses and
- * the jump is a backward jump. We need a second run to
- * get the register info right in this case. Until then,
- * assume unknown register contents.
- */
- Done = 0;
- RC_Invalidate (&Regs);
- break;
- }
- if (J->RI->Out2.RegA != Regs.RegA) {
- Regs.RegA = UNKNOWN_REGVAL;
- }
- if (J->RI->Out2.RegX != Regs.RegX) {
- Regs.RegX = UNKNOWN_REGVAL;
- }
- if (J->RI->Out2.RegY != Regs.RegY) {
- Regs.RegY = UNKNOWN_REGVAL;
- }
- if (J->RI->Out2.SRegLo != Regs.SRegLo) {
- Regs.SRegLo = UNKNOWN_REGVAL;
- }
- if (J->RI->Out2.SRegHi != Regs.SRegHi) {
- Regs.SRegHi = UNKNOWN_REGVAL;
- }
- if (J->RI->Out2.Tmp1 != Regs.Tmp1) {
- Regs.Tmp1 = UNKNOWN_REGVAL;
- }
- ++Entry;
- }
-
- /* Use this register info */
- CurrentRegs = &Regs;
-
- }
-
- /* Generate register info for this instruction */
- CE_GenRegInfo (E, CurrentRegs);
-
- /* Remember for the next insn if this insn was an uncondition branch */
- WasJump = (E->Info & OF_UBRA) != 0;
-
- /* Output registers for this insn are input for the next */
- CurrentRegs = &E->RI->Out;
-
- /* If this insn is a branch on zero flag, we may have more info on
- * register contents for one of both flow directions, but only if
- * there is a previous instruction.
- */
- if ((E->Info & OF_ZBRA) != 0 && (P = CS_GetPrevEntry (S, I)) != 0) {
-
- /* Get the branch condition */
- bc_t BC = GetBranchCond (E->OPC);
-
- /* Check the previous instruction */
- switch (P->OPC) {
-
- case OP65_ADC:
- case OP65_AND:
- case OP65_DEA:
- case OP65_EOR:
- case OP65_INA:
- case OP65_LDA:
- case OP65_ORA:
- case OP65_PLA:
- case OP65_SBC:
- /* A is zero in one execution flow direction */
- if (BC == BC_EQ) {
- E->RI->Out2.RegA = 0;
- } else {
- E->RI->Out.RegA = 0;
- }
- break;
-
- case OP65_CMP:
- /* If this is an immidiate compare, the A register has
- * the value of the compare later.
- */
- if (CE_IsConstImm (P)) {
- if (BC == BC_EQ) {
- E->RI->Out2.RegA = (unsigned char)P->Num;
- } else {
- E->RI->Out.RegA = (unsigned char)P->Num;
- }
- }
- break;
-
- case OP65_CPX:
- /* If this is an immidiate compare, the X register has
- * the value of the compare later.
- */
- if (CE_IsConstImm (P)) {
- if (BC == BC_EQ) {
- E->RI->Out2.RegX = (unsigned char)P->Num;
- } else {
- E->RI->Out.RegX = (unsigned char)P->Num;
- }
- }
- break;
-
- case OP65_CPY:
- /* If this is an immidiate compare, the Y register has
- * the value of the compare later.
- */
- if (CE_IsConstImm (P)) {
- if (BC == BC_EQ) {
- E->RI->Out2.RegY = (unsigned char)P->Num;
- } else {
- E->RI->Out.RegY = (unsigned char)P->Num;
- }
- }
- break;
-
- case OP65_DEX:
- case OP65_INX:
- case OP65_LDX:
- case OP65_PLX:
- /* X is zero in one execution flow direction */
- if (BC == BC_EQ) {
- E->RI->Out2.RegX = 0;
- } else {
- E->RI->Out.RegX = 0;
- }
- break;
-
- case OP65_DEY:
- case OP65_INY:
- case OP65_LDY:
- case OP65_PLY:
- /* X is zero in one execution flow direction */
- if (BC == BC_EQ) {
- E->RI->Out2.RegY = 0;
- } else {
- E->RI->Out.RegY = 0;
- }
- break;
-
- case OP65_TAX:
- case OP65_TXA:
- /* If the branch is a beq, both A and X are zero at the
- * branch target, otherwise they are zero at the next
- * insn.
- */
- if (BC == BC_EQ) {
- E->RI->Out2.RegA = E->RI->Out2.RegX = 0;
- } else {
- E->RI->Out.RegA = E->RI->Out.RegX = 0;
- }
- break;
-
- case OP65_TAY:
- case OP65_TYA:
- /* If the branch is a beq, both A and Y are zero at the
- * branch target, otherwise they are zero at the next
- * insn.
- */
- if (BC == BC_EQ) {
- E->RI->Out2.RegA = E->RI->Out2.RegY = 0;
- } else {
- E->RI->Out.RegA = E->RI->Out.RegY = 0;
- }
- break;
-
- default:
- break;
-
- }
- }
- }
+ /* Assume we're done after this run */
+ Done = 1;
+
+ /* On entry, the register contents are unknown */
+ RC_Invalidate (&Regs);
+ CurrentRegs = &Regs;
+
+ /* Walk over all insns and note just the changes from one insn to the
+ * next one.
+ */
+ WasJump = 0;
+ for (I = 0; I < CS_GetEntryCount (S); ++I) {
+
+ CodeEntry* P;
+
+ /* Get the next instruction */
+ CodeEntry* E = CollAtUnchecked (&S->Entries, I);
+
+ /* If the instruction has a label, we need some special handling */
+ unsigned LabelCount = CE_GetLabelCount (E);
+ if (LabelCount > 0) {
+
+ /* Loop over all entry points that jump here. If these entry
+ * points already have register info, check if all values are
+ * known and identical. If all values are identical, and the
+ * preceeding instruction was not an unconditional branch, check
+ * if the register value on exit of the preceeding instruction
+ * is also identical. If all these values are identical, the
+ * value of a register is known, otherwise it is unknown.
+ */
+ CodeLabel* Label = CE_GetLabel (E, 0);
+ unsigned Entry;
+ if (WasJump) {
+ /* Preceeding insn was an unconditional branch */
+ CodeEntry* J = CL_GetRef(Label, 0);
+ if (J->RI) {
+ Regs = J->RI->Out2;
+ } else {
+ RC_Invalidate (&Regs);
+ }
+ Entry = 1;
+ } else {
+ Regs = *CurrentRegs;
+ Entry = 0;
+ }
+
+ while (Entry < CL_GetRefCount (Label)) {
+ /* Get this entry */
+ CodeEntry* J = CL_GetRef (Label, Entry);
+ if (J->RI == 0) {
+ /* No register info for this entry. This means that the
+ * instruction that jumps here is at higher addresses and
+ * the jump is a backward jump. We need a second run to
+ * get the register info right in this case. Until then,
+ * assume unknown register contents.
+ */
+ Done = 0;
+ RC_Invalidate (&Regs);
+ break;
+ }
+ if (J->RI->Out2.RegA != Regs.RegA) {
+ Regs.RegA = UNKNOWN_REGVAL;
+ }
+ if (J->RI->Out2.RegX != Regs.RegX) {
+ Regs.RegX = UNKNOWN_REGVAL;
+ }
+ if (J->RI->Out2.RegY != Regs.RegY) {
+ Regs.RegY = UNKNOWN_REGVAL;
+ }
+ if (J->RI->Out2.SRegLo != Regs.SRegLo) {
+ Regs.SRegLo = UNKNOWN_REGVAL;
+ }
+ if (J->RI->Out2.SRegHi != Regs.SRegHi) {
+ Regs.SRegHi = UNKNOWN_REGVAL;
+ }
+ if (J->RI->Out2.Tmp1 != Regs.Tmp1) {
+ Regs.Tmp1 = UNKNOWN_REGVAL;
+ }
+ ++Entry;
+ }
+
+ /* Use this register info */
+ CurrentRegs = &Regs;
+
+ }
+
+ /* Generate register info for this instruction */
+ CE_GenRegInfo (E, CurrentRegs);
+
+ /* Remember for the next insn if this insn was an uncondition branch */
+ WasJump = (E->Info & OF_UBRA) != 0;
+
+ /* Output registers for this insn are input for the next */
+ CurrentRegs = &E->RI->Out;
+
+ /* If this insn is a branch on zero flag, we may have more info on
+ * register contents for one of both flow directions, but only if
+ * there is a previous instruction.
+ */
+ if ((E->Info & OF_ZBRA) != 0 && (P = CS_GetPrevEntry (S, I)) != 0) {
+
+ /* Get the branch condition */
+ bc_t BC = GetBranchCond (E->OPC);
+
+ /* Check the previous instruction */
+ switch (P->OPC) {
+
+ case OP65_ADC:
+ case OP65_AND:
+ case OP65_DEA:
+ case OP65_EOR:
+ case OP65_INA:
+ case OP65_LDA:
+ case OP65_ORA:
+ case OP65_PLA:
+ case OP65_SBC:
+ /* A is zero in one execution flow direction */
+ if (BC == BC_EQ) {
+ E->RI->Out2.RegA = 0;
+ } else {
+ E->RI->Out.RegA = 0;
+ }
+ break;
+
+ case OP65_CMP:
+ /* If this is an immidiate compare, the A register has
+ * the value of the compare later.
+ */
+ if (CE_IsConstImm (P)) {
+ if (BC == BC_EQ) {
+ E->RI->Out2.RegA = (unsigned char)P->Num;
+ } else {
+ E->RI->Out.RegA = (unsigned char)P->Num;
+ }
+ }
+ break;
+
+ case OP65_CPX:
+ /* If this is an immidiate compare, the X register has
+ * the value of the compare later.
+ */
+ if (CE_IsConstImm (P)) {
+ if (BC == BC_EQ) {
+ E->RI->Out2.RegX = (unsigned char)P->Num;
+ } else {
+ E->RI->Out.RegX = (unsigned char)P->Num;
+ }
+ }
+ break;
+
+ case OP65_CPY:
+ /* If this is an immidiate compare, the Y register has
+ * the value of the compare later.
+ */
+ if (CE_IsConstImm (P)) {
+ if (BC == BC_EQ) {
+ E->RI->Out2.RegY = (unsigned char)P->Num;
+ } else {
+ E->RI->Out.RegY = (unsigned char)P->Num;
+ }
+ }
+ break;
+
+ case OP65_DEX:
+ case OP65_INX:
+ case OP65_LDX:
+ case OP65_PLX:
+ /* X is zero in one execution flow direction */
+ if (BC == BC_EQ) {
+ E->RI->Out2.RegX = 0;
+ } else {
+ E->RI->Out.RegX = 0;
+ }
+ break;
+
+ case OP65_DEY:
+ case OP65_INY:
+ case OP65_LDY:
+ case OP65_PLY:
+ /* X is zero in one execution flow direction */
+ if (BC == BC_EQ) {
+ E->RI->Out2.RegY = 0;
+ } else {
+ E->RI->Out.RegY = 0;
+ }
+ break;
+
+ case OP65_TAX:
+ case OP65_TXA:
+ /* If the branch is a beq, both A and X are zero at the
+ * branch target, otherwise they are zero at the next
+ * insn.
+ */
+ if (BC == BC_EQ) {
+ E->RI->Out2.RegA = E->RI->Out2.RegX = 0;
+ } else {
+ E->RI->Out.RegA = E->RI->Out.RegX = 0;
+ }
+ break;
+
+ case OP65_TAY:
+ case OP65_TYA:
+ /* If the branch is a beq, both A and Y are zero at the
+ * branch target, otherwise they are zero at the next
+ * insn.
+ */
+ if (BC == BC_EQ) {
+ E->RI->Out2.RegA = E->RI->Out2.RegY = 0;
+ } else {
+ E->RI->Out.RegA = E->RI->Out.RegY = 0;
+ }
+ break;
+
+ default:
+ break;
+
+ }
+ }
+ }