-#define OF_CPU_6502 0x0000U /* 6502 opcode */
-#define OF_CPU_VM 0x0001U /* Virtual machine opcode */
-#define OF_MASK_CPU 0x0001U /* Mask for the cpu field */
-#define OF_UBRA 0x0010U /* Unconditional branch */
-#define OF_CBRA 0x0020U /* Conditional branch */
-#define OF_ZBRA 0x0040U /* Branch on zero flag condition */
-#define OF_FBRA 0x0080U /* Branch on cond set by a load */
-#define OF_LBRA 0x0100U /* Jump/branch is long */
-#define OF_RET 0x0200U /* Return from function */
-#define OF_LOAD 0x0400U /* Register load */
-#define OF_XFR 0x0800U /* Transfer instruction */
-#define OF_CALL 0x1000U /* A subroutine call */
+#define OF_UBRA 0x0001U /* Unconditional branch */
+#define OF_CBRA 0x0002U /* Conditional branch */
+#define OF_ZBRA 0x0004U /* Branch on zero flag condition */
+#define OF_FBRA 0x0008U /* Branch on cond set by a load */
+#define OF_LBRA 0x0010U /* Jump/branch is long */
+#define OF_RET 0x0020U /* Return from function */
+#define OF_LOAD 0x0040U /* Register load */
+#define OF_STORE 0x0080U /* Register store */
+#define OF_XFR 0x0100U /* Transfer instruction */
+#define OF_CALL 0x0200U /* A subroutine call */
+#define OF_REG_INCDEC 0x0400U /* A register increment or decrement */
+#define OF_SETF 0x0800U /* Insn will set all load flags (not carry) */
+#define OF_CMP 0x1000U /* A compare A/X/Y instruction */