* clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
* The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
* state". With hardware there is no such thing as *while* in a state. There
* are only edges. So clk => 0 is in fact a very subtle state transition that
* clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
* The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
* state". With hardware there is no such thing as *while* in a state. There
* are only edges. So clk => 0 is in fact a very subtle state transition that