-int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* checksum)
-{
- working_area_t *crc_algorithm;
- armv4_5_algorithm_t armv4_5_info;
- reg_param_t reg_params[2];
- int retval;
-
- static const uint32_t arm7_9_crc_code[] = {
- 0xE1A02000, /* mov r2, r0 */
- 0xE3E00000, /* mov r0, #0xffffffff */
- 0xE1A03001, /* mov r3, r1 */
- 0xE3A04000, /* mov r4, #0 */
- 0xEA00000B, /* b ncomp */
- /* nbyte: */
- 0xE7D21004, /* ldrb r1, [r2, r4] */
- 0xE59F7030, /* ldr r7, CRC32XOR */
- 0xE0200C01, /* eor r0, r0, r1, asl 24 */
- 0xE3A05000, /* mov r5, #0 */
- /* loop: */
- 0xE3500000, /* cmp r0, #0 */
- 0xE1A06080, /* mov r6, r0, asl #1 */
- 0xE2855001, /* add r5, r5, #1 */
- 0xE1A00006, /* mov r0, r6 */
- 0xB0260007, /* eorlt r0, r6, r7 */
- 0xE3550008, /* cmp r5, #8 */
- 0x1AFFFFF8, /* bne loop */
- 0xE2844001, /* add r4, r4, #1 */
- /* ncomp: */
- 0xE1540003, /* cmp r4, r3 */
- 0x1AFFFFF1, /* bne nbyte */
- /* end: */
- 0xEAFFFFFE, /* b end */
- 0x04C11DB7 /* CRC32XOR: .word 0x04C11DB7 */
- };
-
- uint32_t i;
-
- if (target_alloc_working_area(target, sizeof(arm7_9_crc_code), &crc_algorithm) != ERROR_OK)
- {
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* convert flash writing code into a buffer in target endianness */
- for (i = 0; i < (sizeof(arm7_9_crc_code)/sizeof(uint32_t)); i++)
- {
- if ((retval = target_write_u32(target, crc_algorithm->address + i*sizeof(uint32_t), arm7_9_crc_code[i])) != ERROR_OK)
- {
- return retval;
- }
- }
-
- armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
- armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
- armv4_5_info.core_state = ARMV4_5_STATE_ARM;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
-
- buf_set_u32(reg_params[0].value, 0, 32, address);
- buf_set_u32(reg_params[1].value, 0, 32, count);
-
- if ((retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
- crc_algorithm->address, crc_algorithm->address + (sizeof(arm7_9_crc_code) - 8), 20000, &armv4_5_info)) != ERROR_OK)
- {
- LOG_ERROR("error executing arm7_9 crc algorithm");
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- target_free_working_area(target, crc_algorithm);
- return retval;
- }
-
- *checksum = buf_get_u32(reg_params[0].value, 0, 32);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
-
- target_free_working_area(target, crc_algorithm);
-
- return ERROR_OK;
-}
-
-int arm7_9_blank_check_memory(struct target_s *target, uint32_t address, uint32_t count, uint32_t* blank)
-{
- working_area_t *erase_check_algorithm;
- reg_param_t reg_params[3];
- armv4_5_algorithm_t armv4_5_info;
- int retval;
- uint32_t i;
-
- static const uint32_t erase_check_code[] =
- {
- /* loop: */
- 0xe4d03001, /* ldrb r3, [r0], #1 */
- 0xe0022003, /* and r2, r2, r3 */
- 0xe2511001, /* subs r1, r1, #1 */
- 0x1afffffb, /* bne loop */
- /* end: */
- 0xeafffffe /* b end */
- };
-
- /* make sure we have a working area */
- if (target_alloc_working_area(target, sizeof(erase_check_code), &erase_check_algorithm) != ERROR_OK)
- {
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* convert flash writing code into a buffer in target endianness */
- for (i = 0; i < (sizeof(erase_check_code)/sizeof(uint32_t)); i++)
- if ((retval = target_write_u32(target, erase_check_algorithm->address + i*sizeof(uint32_t), erase_check_code[i])) != ERROR_OK)
- {
- return retval;
- }
-
- armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
- armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
- armv4_5_info.core_state = ARMV4_5_STATE_ARM;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- buf_set_u32(reg_params[0].value, 0, 32, address);
-
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- buf_set_u32(reg_params[1].value, 0, 32, count);
-
- init_reg_param(®_params[2], "r2", 32, PARAM_IN_OUT);
- buf_set_u32(reg_params[2].value, 0, 32, 0xff);
-
- if ((retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
- erase_check_algorithm->address, erase_check_algorithm->address + (sizeof(erase_check_code) - 4), 10000, &armv4_5_info)) != ERROR_OK)
- {
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- target_free_working_area(target, erase_check_algorithm);
- return 0;
- }
-
- *blank = buf_get_u32(reg_params[2].value, 0, 32);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
-
- target_free_working_area(target, erase_check_algorithm);
-
- return ERROR_OK;
-}
-
-int arm7_9_register_commands(struct command_context_s *cmd_ctx)
-{
- command_t *arm7_9_cmd;
-
- arm7_9_cmd = register_command(cmd_ctx, NULL, "arm7_9", NULL, COMMAND_ANY, "arm7/9 specific commands");
-
- register_command(cmd_ctx, arm7_9_cmd, "write_xpsr", handle_arm7_9_write_xpsr_command, COMMAND_EXEC, "write program status register <value> <not cpsr | spsr>");
- register_command(cmd_ctx, arm7_9_cmd, "write_xpsr_im8", handle_arm7_9_write_xpsr_im8_command, COMMAND_EXEC, "write program status register <8bit immediate> <rotate> <not cpsr | spsr>");
-
- register_command(cmd_ctx, arm7_9_cmd, "write_core_reg", handle_arm7_9_write_core_reg_command, COMMAND_EXEC, "write core register <num> <mode> <value>");
-
- register_command(cmd_ctx, arm7_9_cmd, "dbgrq", handle_arm7_9_dbgrq_command,
- COMMAND_ANY, "use EmbeddedICE dbgrq instead of breakpoint for target halt requests <enable | disable>");
- register_command(cmd_ctx, arm7_9_cmd, "fast_memory_access", handle_arm7_9_fast_memory_access_command,
- COMMAND_ANY, "use fast memory accesses instead of slower but potentially safer accesses <enable | disable>");
- register_command(cmd_ctx, arm7_9_cmd, "dcc_downloads", handle_arm7_9_dcc_downloads_command,
- COMMAND_ANY, "use DCC downloads for larger memory writes <enable | disable>");
-
- armv4_5_register_commands(cmd_ctx);
-
- etm_register_commands(cmd_ctx);
-
- return ERROR_OK;
-}
-
-int handle_arm7_9_write_xpsr_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
-{
- uint32_t value;
- int spsr;
- int retval;
- target_t *target = get_current_target(cmd_ctx);
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
-
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
- {
- command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
- return ERROR_OK;
- }
-
- if (target->state != TARGET_HALTED)
- {
- command_print(cmd_ctx, "can't write registers while running");
- return ERROR_OK;
- }
-
- if (argc < 2)
- {
- command_print(cmd_ctx, "usage: write_xpsr <value> <not cpsr | spsr>");
- return ERROR_OK;
- }
-
- value = strtoul(args[0], NULL, 0);
- spsr = strtol(args[1], NULL, 0);
-
- /* if we're writing the CPSR, mask the T bit */
- if (!spsr)
- value &= ~0x20;
-
- arm7_9->write_xpsr(target, value, spsr);
- if ((retval = jtag_execute_queue()) != ERROR_OK)
- {
- LOG_ERROR("JTAG error while writing to xpsr");
- return retval;
- }
-
- return ERROR_OK;
-}
-
-int handle_arm7_9_write_xpsr_im8_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)