- int common_magic;
- armv4_5_mmu_common_t armv4_5_mmu;
- arm9tdmi_common_t arm9tdmi_common;
- int (*read_cp15)(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u32 *value);
- int (*write_cp15)(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u32 value);
- u32 cp15_control_reg;
- u32 d_fsr;
- u32 i_fsr;
- u32 d_far;
-} arm926ejs_common_t;
-
-extern int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, int chain_pos, const char *variant);
-extern int arm926ejs_register_commands(struct command_context_s *cmd_ctx);
-extern int arm926ejs_arch_state(struct target_s *target);
-extern int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-extern int arm926ejs_soft_reset_halt(struct target_s *target);
+ struct arm7_9_common arm7_9_common;
+ uint32_t common_magic;
+ struct armv4_5_mmu_common armv4_5_mmu;
+ int (*read_cp15)(struct target *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
+ int (*write_cp15)(struct target *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
+ uint32_t cp15_control_reg;
+ uint32_t d_fsr;
+ uint32_t i_fsr;
+ uint32_t d_far;
+};
+
+static inline struct arm926ejs_common *
+target_to_arm926(struct target *target)
+{
+ return container_of(target->arch_info, struct arm926ejs_common,
+ arm7_9_common.armv4_5_common);
+}
+
+
+int arm926ejs_init_arch_info(struct target *target,
+ struct arm926ejs_common *arm926ejs, struct jtag_tap *tap);
+int arm926ejs_arch_state(struct target *target);
+int arm926ejs_write_memory(struct target *target,
+ uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int arm926ejs_soft_reset_halt(struct target *target);
+
+extern const struct command_registration arm926ejs_command_handlers[];