LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s",
*(uint32_t*)(mips32->core_cache->reg_list[MIPS32_PC].value),
LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s",
*(uint32_t*)(mips32->core_cache->reg_list[MIPS32_PC].value),
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
enum reset_types jtag_reset_config = jtag_get_reset_config();
if (!(jtag_reset_config & RESET_HAS_SRST))
enum reset_types jtag_reset_config = jtag_get_reset_config();
if (!(jtag_reset_config & RESET_HAS_SRST))
int mips_m4k_deassert_reset(target_t *target)
{
LOG_DEBUG("target->state: %s",
int mips_m4k_deassert_reset(target_t *target)
{
LOG_DEBUG("target->state: %s",