--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * SAM Software Package License\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2015, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/**\r
+ * \file\r
+ *\r
+ * \section Purpose\r
+ *\r
+ * This file provides a basic API for PIO configuration and usage of\r
+ * user-controlled pins. Please refer to the board.h file for a list of\r
+ * available pin definitions.\r
+ *\r
+ * \section Usage\r
+ *\r
+ * -# Define a constant pin description array such as the following one, using\r
+ * the existing definitions provided by the board.h file if possible:\r
+ * \code\r
+ * const struct _pin pins[] = {PIN_USART0_TXD, PIN_USART0_RXD};\r
+ * \endcode\r
+ * Alternatively, it is possible to add new pins by provided the full Pin\r
+ * structure:\r
+ * \code\r
+ * // Pin instance to configure PA10 & PA11 as inputs with the internal\r
+ * // pull-up enabled.\r
+ * const Pin pins = {\r
+ * (1 << 10) | (1 << 11),\r
+ * REG_PIOA,\r
+ * ID_PIOA,\r
+ * PIO_INPUT,\r
+ * PIO_PULLUP\r
+ * };\r
+ * \endcode\r
+ * -# Configure a pin array by calling pio_configure() with a pointer to the\r
+ * array and its size (which is computed using the ARRAY_SIZE macro).\r
+ * -# Change and get the value of a user-controlled pin using the pio_set,\r
+ * pio_clear and pio_get methods.\r
+ * -# Get the level being currently output by a user-controlled pin configured\r
+ * as an output using pio_get_output_date_status().\r
+ */\r
+\r
+#ifndef _PIO_H\r
+#error "pio3.h cannot be included. pio.h should be used instead"\r
+#endif\r
+\r
+#ifndef _PIO4_H\r
+#define _PIO4_H\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Headers\r
+ *------------------------------------------------------------------------------*/\r
+\r
+#include "chip.h"\r
+#include <stdint.h>\r
+\r
+/*------------------------------------------------------------------------------\r
+ * Definitions\r
+ *------------------------------------------------------------------------------*/\r
+\r
+/* The IO group is A (or 0) */\r
+#define PIO_GROUP_A 0\r
+/* The IO group is B (or 1) */\r
+#define PIO_GROUP_B 1\r
+/* The IO group is C (or 2) */\r
+#define PIO_GROUP_C 2\r
+/* The IO group is D (or 3) */\r
+#define PIO_GROUP_D 3\r
+\r
+#define PIO_GROUP_LENGTH PIOIO_GROUP_NUMBER\r
+\r
+/* The pin is controlled by the generic PIO. */\r
+#define PIO_GENERIC 0\r
+/* The pin is controlled by the associated signal of peripheral A. */\r
+#define PIO_PERIPH_A 1\r
+/* The pin is controlled by the associated signal of peripheral B. */\r
+#define PIO_PERIPH_B 2\r
+/* The pin is controlled by the associated signal of peripheral C. */\r
+#define PIO_PERIPH_C 3\r
+/* The pin is controlled by the associated signal of peripheral D. */\r
+#define PIO_PERIPH_D 4\r
+/* The pin is controlled by the associated signal of peripheral E. */\r
+#define PIO_PERIPH_E 5\r
+/* The pin is controlled by the associated signal of peripheral F. */\r
+#define PIO_PERIPH_F 6\r
+/* The pin is controlled by the associated signal of peripheral G. */\r
+#define PIO_PERIPH_G 7\r
+\r
+/* The pin is an input. */\r
+#define PIO_INPUT 10\r
+/* The pin is an output. */\r
+#define PIO_OUTPUT 11\r
+/* The pin is an output and has a default level of 0. */\r
+#define PIO_OUTPUT_0 11\r
+/* The pin is an output and has a default level of 1. */\r
+#define PIO_OUTPUT_1 12\r
+\r
+\r
+/* Default pin configuration (no attribute). */\r
+#define PIO_DEFAULT (0x0u << 0)\r
+/* The internal pin pull-up is active. */\r
+#define PIO_PULLUP (0x1u << 0)\r
+/* The internal pin pull-down is active. */\r
+#define PIO_PULLDOWN (0x1u << 1)\r
+/* The pin is open-drain. */\r
+#define PIO_OPENDRAIN (0x1u << 2)\r
+/* The internal glitch filter is active. */\r
+#define PIO_DEGLITCH (0x1u << 3)\r
+/* The internal Debounce filter is active. */\r
+#define PIO_DEBOUNCE (0x1u << 4)\r
+/* The internal Schmitt trigger is disable. */\r
+#define PIO_TRIGGER_DIS (0x1u << 5)\r
+\r
+/* Drive Strength. */\r
+#define PIO_DRVSTR_Pos 10\r
+#define PIO_DRVSTR_Msk (0x3u << 10)\r
+#define PIO_DRVSTR_HI (0x2u << 10) /* High drive */\r
+#define PIO_DRVSTR_ME (0x1u << 10) /* Medium drive */\r
+#define PIO_DRVSTR_LO (0x0u << 10) /* Low drive */\r
+\r
+#define PIO_EVTSEL_Pos 12\r
+#define PIO_EVTSEL_Msk (0x7u << 12)\r
+/* Event detection on input falling edge. */\r
+#define PIO_IT_FALL_EDGE (0x0u << 12)\r
+/* Event detection on input rising edge. */\r
+#define PIO_IT_RISE_EDGE (0x1u << 12)\r
+/* Event detection on input both edge. */\r
+#define PIO_IT_BOTH_EDGE (0x2u << 12)\r
+/* Event detection on low level input. */\r
+#define PIO_IT_LOW_LEVEL (0x3u << 12)\r
+/*Event detection on high level input. */\r
+#define PIO_IT_HIGH_LEVEL (0x4u << 12)\r
+\r
+#define PIO_WPMR_WPEN_EN ( 0x01 << 0 )\r
+\r
+#define PIO_WPMR_WPEN_DIS ( 0x00 << 0 )\r
+\r
+#define PIO_WPMR_WPKEY_VALID ( 0x50494F << 8 )\r
+\r
+#endif /* #ifndef _PIO4_H */\r
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