--- /dev/null
+/* ----------------------------------------------------------------------------\r
+ * SAM Software Package License\r
+ * ----------------------------------------------------------------------------\r
+ * Copyright (c) 2014, Atmel Corporation\r
+ *\r
+ * All rights reserved.\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * - Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the disclaimer below.\r
+ *\r
+ * Atmel's name may not be used to endorse or promote products derived from\r
+ * this software without specific prior written permission.\r
+ *\r
+ * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR\r
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,\r
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\r
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,\r
+ * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF\r
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING\r
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\r
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ * ----------------------------------------------------------------------------\r
+ */\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Headers\r
+ *----------------------------------------------------------------------------*/\r
+\r
+#include "chip.h"\r
+#include "compiler.h"\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Definitions\r
+ *----------------------------------------------------------------------------*/\r
+\r
+struct peripheral_xdma {\r
+ uint32_t id; /**< Peripheral ID */\r
+ uint8_t iftx; /**< DMA Interface for TX */\r
+ uint8_t ifrx; /**< DMA Interface for RX */\r
+};\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Local constants\r
+ *----------------------------------------------------------------------------*/\r
+\r
+static uint8_t _h64_peripherals[] = {\r
+ ID_ARM_PMU, /* 2: Performance Monitor Unit (PMU) (ARM_PMU) */\r
+ ID_XDMAC0, /* 6: DMA Controller 0 (XDMAC0) */\r
+ ID_XDMAC1, /* 7: DMA Controller 1 (XDMAC1) */\r
+ ID_AES, /* 9: Advanced Enion Standard (AES) */\r
+ ID_AESB, /* 10: AES bridge (AESB) */\r
+ ID_SHA, /* 12: SHA Signature (SHA) */\r
+ ID_MPDDRC, /* 13: MPDDR controller (MPDDRC) */\r
+ ID_MATRIX0, /* 15: H64MX, 64-bit AHB Matrix (MATRIX0) */\r
+ ID_SDMMC0, /* 31: Secure Digital Multimedia Card Controller 0 (SDMMC0) */\r
+ ID_SDMMC1, /* 32: Secure Digital Multimedia Card Controller 1 (SDMMC1) */\r
+ ID_LCDC, /* 45: LCD Controller (LCDC) */\r
+ ID_ISC, /* 46: Camera Interface (ISC) */\r
+ ID_QSPI0, /* 52: QSPI 0 (QSPI0) */\r
+ ID_QSPI1, /* 53: QSPI 1 (QSPI1) */\r
+ ID_L2CC, /* 63: L2 Cache Controller (L2CC) */\r
+};\r
+\r
+static const struct peripheral_xdma _xdmac_peripherals[] = {\r
+ { ID_TWIHS0, 0, 1 },\r
+ { ID_TWIHS1, 2, 3 },\r
+ { ID_QSPI0, 4, 5 },\r
+ { ID_SPI0, 6, 7 },\r
+ { ID_SPI1, 8, 9 },\r
+ { ID_PWM, 10, 0xff },\r
+ { ID_FLEXCOM0, 11, 12 },\r
+ { ID_FLEXCOM1, 13, 14 },\r
+ { ID_FLEXCOM2, 15, 16 },\r
+ { ID_FLEXCOM3, 17, 18 },\r
+ { ID_FLEXCOM4, 19, 20 },\r
+ { ID_SSC0, 21, 22 },\r
+ { ID_SSC1, 23, 24 },\r
+ { ID_ADC, 0xff, 25 },\r
+ { ID_AES, 26, 27 },\r
+ { ID_TDES, 28, 29 },\r
+ { ID_SHA, 30, 0xff },\r
+ { ID_I2SC0, 31, 32 },\r
+ { ID_I2SC1, 33, 34 },\r
+ { ID_UART0, 35, 36 },\r
+ { ID_UART1, 37, 38 },\r
+ { ID_UART2, 39, 40 },\r
+ { ID_UART3, 41, 42 },\r
+ { ID_UART4, 43, 44 },\r
+ { ID_TC0, 0xff, 45 },\r
+ { ID_TC1, 0xff, 46 },\r
+ { ID_CLASSD, 47, 0xff },\r
+ { ID_QSPI0, 48, 49 },\r
+ { ID_PDMIC, 0xff, 50 },\r
+};\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Private functions\r
+ *----------------------------------------------------------------------------*/\r
+\r
+static const struct peripheral_xdma *get_peripheral_xdma(uint32_t id, Xdmac *xdmac)\r
+{\r
+ unsigned int i;\r
+\r
+ if (xdmac != XDMAC0 && xdmac != XDMAC1) {\r
+ return NULL;\r
+ }\r
+\r
+ for (i = 0; i < ARRAY_SIZE(_xdmac_peripherals); i++) {\r
+ if (_xdmac_peripherals[i].id == id) {\r
+ return &_xdmac_peripherals[i];\r
+ }\r
+ }\r
+\r
+ return NULL;\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+ * Exported functions\r
+ *----------------------------------------------------------------------------*/\r
+\r
+Flexcom* get_flexcom_addr_from_id(const uint32_t id)\r
+{\r
+ if (id == ID_FLEXCOM0) return FLEXCOM0; /**< \brief FLEXCOM 0 (FLEXCOM0) */\r
+#ifdef FLEXCOM1\r
+ else if (id == ID_FLEXCOM1) return FLEXCOM1; /**< \brief FLEXCOM 1 (FLEXCOM1) */\r
+#endif\r
+#ifdef FLEXCOM2\r
+ else if (id == ID_FLEXCOM2) return FLEXCOM2; /**< \brief FLEXCOM 2 (FLEXCOM2) */\r
+#endif\r
+#ifdef FLEXCOM3\r
+ else if (id == ID_FLEXCOM3) return FLEXCOM3; /**< \brief FLEXCOM 3 (FLEXCOM3) */\r
+#endif\r
+#ifdef FLEXCOM4\r
+ else if (id == ID_FLEXCOM4) return FLEXCOM4; /**< \brief FLEXCOM 4 (FLEXCOM4) */\r
+#endif\r
+ else return (void*)0;\r
+}\r
+\r
+uint32_t get_twi_id_from_addr(const Twi* addr)\r
+{\r
+ if (addr == (void*)TWI0) return ID_FLEXCOM0; /**< \brief FLEXCOM 0 (FLEXCOM0) */\r
+#ifdef TWI1\r
+ else if (addr == (void*)TWI1) return ID_FLEXCOM1; /**< \brief FLEXCOM 1 (FLEXCOM1) */\r
+#endif\r
+#ifdef TWI2\r
+ else if (addr == (void*)TWI2) return ID_FLEXCOM2; /**< \brief FLEXCOM 2 (FLEXCOM2) */\r
+#endif\r
+#ifdef TWI3\r
+ else if (addr == (void*)TWI3) return ID_FLEXCOM3; /**< \brief FLEXCOM 3 (FLEXCOM3) */\r
+#endif\r
+#ifdef TWI4\r
+ else if (addr == (void*)TWI4) return ID_FLEXCOM4; /**< \brief FLEXCOM 4 (FLEXCOM4) */\r
+#endif\r
+#ifdef TWIHS0\r
+ else if (addr == (void*)TWIHS0) return ID_TWIHS0; /**< \brief TWIHS0 */\r
+#endif\r
+#ifdef TWIHS0\r
+ else if (addr == (void*)TWIHS1) return ID_TWIHS1; /**< \brief TWIHS1 */\r
+#endif\r
+ else return ID_PERIPH_COUNT;\r
+}\r
+\r
+Twi* get_twi_addr_from_id(const uint32_t id)\r
+{\r
+ if (id == ID_FLEXCOM0) return TWI0; /**< \brief FLEXCOM 0 (FLEXCOM0) */\r
+#ifdef TWI1\r
+ else if (id == ID_FLEXCOM1) return TWI1; /**< \brief FLEXCOM 1 (FLEXCOM1) */\r
+#endif\r
+#ifdef TWI2\r
+ else if (id == ID_FLEXCOM2) return TWI2; /**< \brief FLEXCOM 2 (FLEXCOM2) */\r
+#endif\r
+#ifdef TWI3\r
+ else if (id == ID_FLEXCOM3) return TWI3; /**< \brief FLEXCOM 3 (FLEXCOM3) */\r
+#endif\r
+#ifdef TWI4\r
+ else if (id == ID_FLEXCOM4) return TWI4; /**< \brief FLEXCOM 4 (FLEXCOM4) */\r
+#endif\r
+#ifdef TWIHS0\r
+ else if (id == ID_TWIHS0) return (Twi*)TWIHS0; /**< \brief TWIHS0 */\r
+#endif\r
+#ifdef TWIHS1\r
+ else if (id == ID_TWIHS1) return (Twi*)TWIHS1; /**< \brief TWIHS1 */\r
+#endif\r
+ else return (void*)0;\r
+}\r
+\r
+uint32_t get_spi_id_from_addr(const Spi* addr)\r
+{\r
+ if (addr == (void*)SPI0) return ID_SPI0;\r
+#ifdef SPI1\r
+ else if (addr == (void*)SPI1) return ID_SPI1;\r
+#endif\r
+#ifdef FCOMSPI0\r
+ else if (addr == (void*)FCOMSPI0) return ID_FCOMSPI0;\r
+#endif\r
+#ifdef FCOMSPI1\r
+ else if (addr == (void*)FCOMSPI1) return ID_FCOMSPI1;\r
+#endif\r
+#ifdef FCOMSPI2\r
+ else if (addr == (void*)FCOMSPI2) return ID_FCOMSPI2;\r
+#endif\r
+#ifdef FCOMSPI3\r
+ else if (addr == (void*)FCOMSPI3) return ID_FCOMSPI3;\r
+#endif\r
+#ifdef FCOMSPI4\r
+ else if (addr == (void*)FCOMSPI4) return ID_FCOMSPI4;\r
+#endif\r
+ else return ID_PERIPH_COUNT;\r
+}\r
+\r
+Spi* get_spi_addr_from_id(const uint32_t id)\r
+{\r
+ if (id == ID_SPI0) return SPI0; /**< \brief SPI 0 (SPI0) */\r
+#ifdef SPI1\r
+ else if (id == ID_SPI1) return SPI1; /**< \brief SPI 1 (SPI1) */\r
+#endif\r
+#ifdef FCOMSPI0\r
+ else if (id == ID_FCOMSPI0) return FCOMSPI0; /**< \brief FLEXCOM SPI 0 (FCOMSPI0) */\r
+#endif\r
+#ifdef FCOMSPI1\r
+ else if (id == ID_FCOMSPI1) return FCOMSPI1; /**< \brief FLEXCOM SPI 1 (FCOMSPI1) */\r
+#endif\r
+#ifdef FCOMSPI2\r
+ else if (id == ID_FCOMSPI2) return FCOMSPI2; /**< \brief FLEXCOM SPI 1 (FCOMSPI1) */\r
+#endif\r
+#ifdef FCOMSPI3\r
+ else if (id == ID_FCOMSPI3) return FCOMSPI3; /**< \brief FLEXCOM SPI 3 (FCOMSPI3) */\r
+#endif\r
+#ifdef FCOMSPI4\r
+ else if (id == ID_FCOMSPI4) return FCOMSPI4; /**< \brief FLEXCOM SPI 4 (FCOMSPI4) */\r
+#endif\r
+ else return (void*)0;\r
+}\r
+\r
+uint32_t get_uart_id_from_addr(const Uart* addr)\r
+{\r
+ if (addr == (void*)UART0) return ID_UART0;\r
+#ifdef UART1\r
+ else if (addr == (void*)UART1) return ID_UART1;\r
+#endif\r
+#ifdef UART2\r
+ else if (addr == (void*)UART2) return ID_UART2;\r
+#endif\r
+#ifdef UART3\r
+ else if (addr == (void*)UART3) return ID_UART3;\r
+#endif\r
+#ifdef UART4\r
+ else if (addr == (void*)UART4) return ID_UART4;\r
+#endif\r
+ else return ID_PERIPH_COUNT;\r
+}\r
+\r
+uint32_t get_usart_id_from_addr(const Usart* addr)\r
+{\r
+ if (addr == (void*)USART0) return ID_USART0;\r
+#ifdef USART1\r
+ else if (addr == (void*)USART1) return ID_USART1;\r
+#endif\r
+#ifdef USART2\r
+ else if (addr == (void*)USART2) return ID_USART2;\r
+#endif\r
+#ifdef USART3\r
+ else if (addr == (void*)USART3) return ID_USART3;\r
+#endif\r
+#ifdef USART4\r
+ else if (addr == (void*)USART4) return ID_USART4;\r
+#endif\r
+ else return ID_PERIPH_COUNT;\r
+}\r
+\r
+uint32_t get_tc_id_from_addr(const Tc* addr)\r
+{\r
+ if (addr == TC0) return ID_TC0;\r
+#ifdef TC1\r
+ else if (addr == TC1) return ID_TC1;\r
+#endif\r
+ else return ID_PERIPH_COUNT;\r
+}\r
+\r
+Tc* get_tc_addr_from_id(const uint32_t id)\r
+{\r
+ if (id == ID_TC0) return TC0; /**< \brief Timer/Counter 0 (TC0) */\r
+#ifdef TC1\r
+ else if (id == ID_TC1) return TC1; /**< \brief Timer/Counter 1 (TC1) */\r
+#endif\r
+ else return (void*)0;\r
+}\r
+\r
+uint32_t get_qspi_id_from_addr(const Qspi* addr)\r
+{\r
+ if (addr == (void*)QSPI0) return ID_QSPI0;\r
+ else if (addr == (void*)QSPI1) return ID_QSPI1;\r
+ else return ID_PERIPH_COUNT;\r
+}\r
+\r
+void *get_qspi_mem_from_addr(const Qspi* addr)\r
+{\r
+ if (addr == (void*)QSPI0) return (void*)QSPIMEM0_ADDR;\r
+ else if (addr == (void*)QSPI1) return (void*)QSPIMEM1_ADDR;\r
+ else return NULL;\r
+}\r
+\r
+uint32_t get_gmac_id_from_addr(const Gmac* addr)\r
+{\r
+ if (addr == (void*)GMAC0) return ID_GMAC0;\r
+ else return ID_PERIPH_COUNT;\r
+}\r
+\r
+Matrix* get_peripheral_matrix(uint32_t id)\r
+{\r
+ unsigned int i;\r
+\r
+ for (i = 0; i < ARRAY_SIZE(_h64_peripherals); i++)\r
+ if (_h64_peripherals[i] == id)\r
+ return MATRIX0; // AHB 64-bit matrix\r
+ return MATRIX1; // AHB 32-bit matrix\r
+}\r
+\r
+uint32_t get_peripheral_clock_divider(uint32_t id)\r
+{\r
+ Matrix* matrix = get_peripheral_matrix(id);\r
+\r
+ if (matrix == MATRIX1) {\r
+ if (PMC->PMC_MCKR & PMC_MCKR_H32MXDIV_H32MXDIV2)\r
+ return 2;\r
+ else\r
+ return 1;\r
+ }\r
+\r
+ return 1;\r
+}\r
+\r
+uint8_t get_peripheral_xdma_channel(uint32_t id, Xdmac *xdmac, bool transmit)\r
+{\r
+ const struct peripheral_xdma *periph_xdma = get_peripheral_xdma(id, xdmac);\r
+ if (periph_xdma) {\r
+ return transmit ? periph_xdma->iftx : periph_xdma->ifrx;\r
+ } else {\r
+ return 0xff;\r
+ }\r
+}\r
+\r
+bool is_peripheral_on_xdma_controller(uint32_t id, Xdmac *xdmac)\r
+{\r
+ return get_peripheral_xdma(id, xdmac) != NULL;\r
+}\r
+\r
+int32_t get_peripheral_fifo_depth(void* addr)\r
+{\r
+ uint32_t size = (uint32_t)-1;\r
+ uint32_t tmp = (uint32_t)addr;\r
+ switch (tmp) {\r
+ case (uint32_t)USART0:\r
+#ifdef USART1\r
+ case (uint32_t)USART1:\r
+#endif\r
+#ifdef USART2\r
+ case (uint32_t)USART2:\r
+#endif\r
+ case (uint32_t)USART3:\r
+#ifdef USART3\r
+ case (uint32_t)USART4:\r
+#endif\r
+ size = FLEXCOM_USART_FIFO_DEPTH;\r
+ break;\r
+\r
+ case (uint32_t)FCOMSPI0:\r
+#ifdef FCOMSPI1\r
+ case (uint32_t)FCOMSPI1:\r
+#endif\r
+#ifdef FCOMSPI2\r
+ case (uint32_t)FCOMSPI2:\r
+#endif\r
+#ifdef FCOMSPI3\r
+ case (uint32_t)FCOMSPI3:\r
+#endif\r
+#ifdef FCOMSPI4\r
+ case (uint32_t)FCOMSPI4:\r
+#endif\r
+ size = FLEXCOM_SPI_FIFO_DEPTH;\r
+ break;\r
+ case (uint32_t)SPI0:\r
+#ifdef SPI1\r
+ case (uint32_t)SPI1:\r
+#endif\r
+ size = SPI_FIFO_DEPTH;\r
+ break;\r
+ case (uint32_t)TWI0:\r
+#ifdef TWI1\r
+ case (uint32_t)TWI1:\r
+#endif\r
+#ifdef TWI2\r
+ case (uint32_t)TWI2:\r
+#endif\r
+#ifdef TWI3\r
+ case (uint32_t)TWI3:\r
+#endif\r
+#ifdef TWI4\r
+ case (uint32_t)TWI4:\r
+#endif\r
+#ifdef TWIHS0\r
+ case (uint32_t)TWIHS0:\r
+#endif\r
+#ifdef TWIHS1\r
+ case (uint32_t)TWIHS1:\r
+#endif\r
+ size = TWI_FIFO_DEPTH;\r
+ break;\r
+ default:\r
+ size = (uint32_t)-1;\r
+ }\r
+ return size;\r
+}\r
projects / freertos / blobdiff