--- /dev/null
+/**\r
+ * \file\r
+ *\r
+ * \brief Atmel part identification macros\r
+ *\r
+ * Copyright (C) 2012-2013 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ * Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+\r
+#ifndef ATMEL_PARTS_H\r
+#define ATMEL_PARTS_H\r
+\r
+/**\r
+ * \defgroup part_macros_group Atmel part identification macros\r
+ *\r
+ * This collection of macros identify which series and families that the various\r
+ * Atmel parts belong to. These can be used to select part-dependent sections of\r
+ * code at compile time.\r
+ *\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \name Convenience macros for part checking\r
+ * @{\r
+ */\r
+/* ! Check GCC and IAR part definition for 8-bit AVR */\r
+#define AVR8_PART_IS_DEFINED(part) \\r
+ (defined(__ ## part ## __) || defined(__AVR_ ## part ## __))\r
+\r
+/* ! Check GCC and IAR part definition for 32-bit AVR */\r
+#define AVR32_PART_IS_DEFINED(part) \\r
+ (defined(__AT32 ## part ## __) || defined(__AVR32_ ## part ## __))\r
+\r
+/* ! Check GCC and IAR part definition for SAM */\r
+#define SAM_PART_IS_DEFINED(part) (defined(__ ## part ## __))\r
+/** @} */\r
+\r
+/**\r
+ * \defgroup uc3_part_macros_group AVR UC3 parts\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \name AVR UC3 A series\r
+ * @{\r
+ */\r
+#define UC3A0 ( \\r
+ AVR32_PART_IS_DEFINED(UC3A0128) || \\r
+ AVR32_PART_IS_DEFINED(UC3A0256) || \\r
+ AVR32_PART_IS_DEFINED(UC3A0512) \\r
+ )\r
+\r
+#define UC3A1 ( \\r
+ AVR32_PART_IS_DEFINED(UC3A1128) || \\r
+ AVR32_PART_IS_DEFINED(UC3A1256) || \\r
+ AVR32_PART_IS_DEFINED(UC3A1512) \\r
+ )\r
+\r
+#define UC3A3 ( \\r
+ AVR32_PART_IS_DEFINED(UC3A364) || \\r
+ AVR32_PART_IS_DEFINED(UC3A364S) || \\r
+ AVR32_PART_IS_DEFINED(UC3A3128) || \\r
+ AVR32_PART_IS_DEFINED(UC3A3128S) || \\r
+ AVR32_PART_IS_DEFINED(UC3A3256) || \\r
+ AVR32_PART_IS_DEFINED(UC3A3256S) \\r
+ )\r
+\r
+#define UC3A4 ( \\r
+ AVR32_PART_IS_DEFINED(UC3A464) || \\r
+ AVR32_PART_IS_DEFINED(UC3A464S) || \\r
+ AVR32_PART_IS_DEFINED(UC3A4128) || \\r
+ AVR32_PART_IS_DEFINED(UC3A4128S) || \\r
+ AVR32_PART_IS_DEFINED(UC3A4256) || \\r
+ AVR32_PART_IS_DEFINED(UC3A4256S) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name AVR UC3 B series\r
+ * @{\r
+ */\r
+#define UC3B0 ( \\r
+ AVR32_PART_IS_DEFINED(UC3B064) || \\r
+ AVR32_PART_IS_DEFINED(UC3B0128) || \\r
+ AVR32_PART_IS_DEFINED(UC3B0256) || \\r
+ AVR32_PART_IS_DEFINED(UC3B0512) \\r
+ )\r
+\r
+#define UC3B1 ( \\r
+ AVR32_PART_IS_DEFINED(UC3B164) || \\r
+ AVR32_PART_IS_DEFINED(UC3B1128) || \\r
+ AVR32_PART_IS_DEFINED(UC3B1256) || \\r
+ AVR32_PART_IS_DEFINED(UC3B1512) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name AVR UC3 C series\r
+ * @{\r
+ */\r
+#define UC3C0 ( \\r
+ AVR32_PART_IS_DEFINED(UC3C064C) || \\r
+ AVR32_PART_IS_DEFINED(UC3C0128C) || \\r
+ AVR32_PART_IS_DEFINED(UC3C0256C) || \\r
+ AVR32_PART_IS_DEFINED(UC3C0512C) \\r
+ )\r
+\r
+#define UC3C1 ( \\r
+ AVR32_PART_IS_DEFINED(UC3C164C) || \\r
+ AVR32_PART_IS_DEFINED(UC3C1128C) || \\r
+ AVR32_PART_IS_DEFINED(UC3C1256C) || \\r
+ AVR32_PART_IS_DEFINED(UC3C1512C) \\r
+ )\r
+\r
+#define UC3C2 ( \\r
+ AVR32_PART_IS_DEFINED(UC3C264C) || \\r
+ AVR32_PART_IS_DEFINED(UC3C2128C) || \\r
+ AVR32_PART_IS_DEFINED(UC3C2256C) || \\r
+ AVR32_PART_IS_DEFINED(UC3C2512C) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name AVR UC3 D series\r
+ * @{\r
+ */\r
+#define UC3D3 ( \\r
+ AVR32_PART_IS_DEFINED(UC64D3) || \\r
+ AVR32_PART_IS_DEFINED(UC128D3) \\r
+ )\r
+\r
+#define UC3D4 ( \\r
+ AVR32_PART_IS_DEFINED(UC64D4) || \\r
+ AVR32_PART_IS_DEFINED(UC128D4) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name AVR UC3 L series\r
+ * @{\r
+ */\r
+#define UC3L0 ( \\r
+ AVR32_PART_IS_DEFINED(UC3L016) || \\r
+ AVR32_PART_IS_DEFINED(UC3L032) || \\r
+ AVR32_PART_IS_DEFINED(UC3L064) \\r
+ )\r
+\r
+#define UC3L0128 ( \\r
+ AVR32_PART_IS_DEFINED(UC3L0128) \\r
+ )\r
+\r
+#define UC3L0256 ( \\r
+ AVR32_PART_IS_DEFINED(UC3L0256) \\r
+ )\r
+\r
+#define UC3L3 ( \\r
+ AVR32_PART_IS_DEFINED(UC64L3U) || \\r
+ AVR32_PART_IS_DEFINED(UC128L3U) || \\r
+ AVR32_PART_IS_DEFINED(UC256L3U) \\r
+ )\r
+\r
+#define UC3L4 ( \\r
+ AVR32_PART_IS_DEFINED(UC64L4U) || \\r
+ AVR32_PART_IS_DEFINED(UC128L4U) || \\r
+ AVR32_PART_IS_DEFINED(UC256L4U) \\r
+ )\r
+\r
+#define UC3L3_L4 (UC3L3 || UC3L4)\r
+/** @} */\r
+\r
+/**\r
+ * \name AVR UC3 families\r
+ * @{\r
+ */\r
+/** AVR UC3 A family */\r
+#define UC3A (UC3A0 || UC3A1 || UC3A3 || UC3A4)\r
+\r
+/** AVR UC3 B family */\r
+#define UC3B (UC3B0 || UC3B1)\r
+\r
+/** AVR UC3 C family */\r
+#define UC3C (UC3C0 || UC3C1 || UC3C2)\r
+\r
+/** AVR UC3 D family */\r
+#define UC3D (UC3D3 || UC3D4)\r
+\r
+/** AVR UC3 L family */\r
+#define UC3L (UC3L0 || UC3L0128 || UC3L0256 || UC3L3_L4)\r
+/** @} */\r
+\r
+/** AVR UC3 product line */\r
+#define UC3 (UC3A || UC3B || UC3C || UC3D || UC3L)\r
+\r
+/** @} */\r
+\r
+/**\r
+ * \defgroup xmega_part_macros_group AVR XMEGA parts\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \name AVR XMEGA A series\r
+ * @{\r
+ */\r
+#define XMEGA_A1 ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega64A1) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega128A1) \\r
+ )\r
+\r
+#define XMEGA_A3 ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega64A3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega128A3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega192A3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega256A3) \\r
+ )\r
+\r
+#define XMEGA_A3B ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega256A3B) \\r
+ )\r
+\r
+#define XMEGA_A4 ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega16A4) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega32A4) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name AVR XMEGA AU series\r
+ * @{\r
+ */\r
+#define XMEGA_A1U ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega64A1U) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega128A1U) \\r
+ )\r
+\r
+#define XMEGA_A3U ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega64A3U) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega128A3U) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega192A3U) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega256A3U) \\r
+ )\r
+\r
+#define XMEGA_A3BU ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega256A3BU) \\r
+ )\r
+\r
+#define XMEGA_A4U ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega16A4U) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega32A4U) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega64A4U) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega128A4U) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name AVR XMEGA B series\r
+ * @{\r
+ */\r
+#define XMEGA_B1 ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega64B1) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega128B1) \\r
+ )\r
+\r
+#define XMEGA_B3 ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega64B3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega128B3) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name AVR XMEGA C series\r
+ * @{\r
+ */\r
+#define XMEGA_C3 ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega384C3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega256C3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega192C3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega128C3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega64C3) \\r
+ )\r
+\r
+#define XMEGA_C4 ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega32C4) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega16C4) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name AVR XMEGA D series\r
+ * @{\r
+ */\r
+#define XMEGA_D3 ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega64D3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega128D3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega192D3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega256D3) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega384D3) \\r
+ )\r
+\r
+#define XMEGA_D4 ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega16D4) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega32D4) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega64D4) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega128D4) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name AVR XMEGA E series\r
+ * @{\r
+ */\r
+#define XMEGA_E5 ( \\r
+ AVR8_PART_IS_DEFINED(ATxmega8E5) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega16E5) || \\r
+ AVR8_PART_IS_DEFINED(ATxmega32E5) \\r
+ )\r
+/** @} */\r
+\r
+\r
+/**\r
+ * \name AVR XMEGA families\r
+ * @{\r
+ */\r
+/** AVR XMEGA A family */\r
+#define XMEGA_A (XMEGA_A1 || XMEGA_A3 || XMEGA_A3B || XMEGA_A4)\r
+\r
+/** AVR XMEGA AU family */\r
+#define XMEGA_AU (XMEGA_A1U || XMEGA_A3U || XMEGA_A3BU || XMEGA_A4U)\r
+\r
+/** AVR XMEGA B family */\r
+#define XMEGA_B (XMEGA_B1 || XMEGA_B3)\r
+\r
+/** AVR XMEGA C family */\r
+#define XMEGA_C (XMEGA_C3 || XMEGA_C4)\r
+\r
+/** AVR XMEGA D family */\r
+#define XMEGA_D (XMEGA_D3 || XMEGA_D4)\r
+\r
+/** AVR XMEGA E family */\r
+#define XMEGA_E (XMEGA_E5)\r
+/** @} */\r
+\r
+\r
+/** AVR XMEGA product line */\r
+#define XMEGA (XMEGA_A || XMEGA_AU || XMEGA_B || XMEGA_C || XMEGA_D || XMEGA_E)\r
+\r
+/** @} */\r
+\r
+/**\r
+ * \defgroup mega_part_macros_group megaAVR parts\r
+ *\r
+ * \note These megaAVR groupings are based on the groups in AVR Libc for the\r
+ * part header files. They are not names of official megaAVR device series or\r
+ * families.\r
+ *\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \name ATmegaxx0/xx1 subgroups\r
+ * @{\r
+ */\r
+#define MEGA_XX0 ( \\r
+ AVR8_PART_IS_DEFINED(ATmega640) || \\r
+ AVR8_PART_IS_DEFINED(ATmega1280) || \\r
+ AVR8_PART_IS_DEFINED(ATmega2560) \\r
+ )\r
+\r
+#define MEGA_XX1 ( \\r
+ AVR8_PART_IS_DEFINED(ATmega1281) || \\r
+ AVR8_PART_IS_DEFINED(ATmega2561) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name megaAVR groups\r
+ * @{\r
+ */\r
+/** ATmegaxx0/xx1 group */\r
+#define MEGA_XX0_1 (MEGA_XX0 || MEGA_XX1)\r
+\r
+/** ATmegaxx4 group */\r
+#define MEGA_XX4 ( \\r
+ AVR8_PART_IS_DEFINED(ATmega164A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega164PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega324A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega324PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega644) || \\r
+ AVR8_PART_IS_DEFINED(ATmega644A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega644PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega1284P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega128RFA1) \\r
+ )\r
+\r
+/** ATmegaxx4 group */\r
+#define MEGA_XX4_A ( \\r
+ AVR8_PART_IS_DEFINED(ATmega164A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega164PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega324A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega324PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega644A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega644PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega1284P) \\r
+ )\r
+\r
+/** ATmegaxx8 group */\r
+#define MEGA_XX8 ( \\r
+ AVR8_PART_IS_DEFINED(ATmega48) || \\r
+ AVR8_PART_IS_DEFINED(ATmega48A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega48PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega88) || \\r
+ AVR8_PART_IS_DEFINED(ATmega88A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega88PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega168) || \\r
+ AVR8_PART_IS_DEFINED(ATmega168A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega168PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega328) || \\r
+ AVR8_PART_IS_DEFINED(ATmega328P) \\r
+ )\r
+\r
+/** ATmegaxx8A/P/PA group */\r
+#define MEGA_XX8_A ( \\r
+ AVR8_PART_IS_DEFINED(ATmega48A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega48PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega88A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega88PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega168A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega168PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega328P) \\r
+ )\r
+\r
+/** ATmegaxx group */\r
+#define MEGA_XX ( \\r
+ AVR8_PART_IS_DEFINED(ATmega16) || \\r
+ AVR8_PART_IS_DEFINED(ATmega16A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega32) || \\r
+ AVR8_PART_IS_DEFINED(ATmega32A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega64) || \\r
+ AVR8_PART_IS_DEFINED(ATmega64A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega128) || \\r
+ AVR8_PART_IS_DEFINED(ATmega128A) \\r
+ )\r
+\r
+/** ATmegaxxA/P/PA group */\r
+#define MEGA_XX_A ( \\r
+ AVR8_PART_IS_DEFINED(ATmega16A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega32A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega64A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega128A) \\r
+ )\r
+/** ATmegaxxRFA1 group */\r
+#define MEGA_RFA1 ( \\r
+ AVR8_PART_IS_DEFINED(ATmega128RFA1) \\r
+ )\r
+ \r
+/** ATmegaxxRFR2 group */\r
+#define MEGA_RFR2 ( \\r
+ AVR8_PART_IS_DEFINED(ATmega64RFR2) || \\r
+ AVR8_PART_IS_DEFINED(ATmega128RFR2) || \\r
+ AVR8_PART_IS_DEFINED(ATmega256RFR2) \\r
+ )\r
+ \r
+/** ATmegaxxRFxx group */\r
+#define MEGA_RF (MEGA_RFA1 || MEGA_RFR2)\r
+\r
+/**\r
+ * \name ATmegaxx_un0/un1/un2 subgroups\r
+ * @{\r
+ */\r
+#define MEGA_XX_UN0 ( \\r
+ AVR8_PART_IS_DEFINED(ATmega16) || \\r
+ AVR8_PART_IS_DEFINED(ATmega16A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega32) || \\r
+ AVR8_PART_IS_DEFINED(ATmega32A) \\r
+ )\r
+\r
+/** ATmegaxx group without power reduction and\r
+ * And interrupt sense register.\r
+ */\r
+#define MEGA_XX_UN1 ( \\r
+ AVR8_PART_IS_DEFINED(ATmega64) || \\r
+ AVR8_PART_IS_DEFINED(ATmega64A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega128) || \\r
+ AVR8_PART_IS_DEFINED(ATmega128A) \\r
+ )\r
+\r
+/** ATmegaxx group without power reduction and\r
+ * And interrupt sense register.\r
+ */\r
+#define MEGA_XX_UN2 ( \\r
+ AVR8_PART_IS_DEFINED(ATmega169P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega169PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega329P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega329PA) \\r
+ )\r
+\r
+/** Devices added to complete megaAVR offering.\r
+ * Please do not use this group symbol as it is not intended\r
+ * to be permanent: the devices should be regrouped.\r
+ */\r
+#define MEGA_UNCATEGORIZED ( \\r
+ AVR8_PART_IS_DEFINED(AT90CAN128) || \\r
+ AVR8_PART_IS_DEFINED(AT90CAN32) || \\r
+ AVR8_PART_IS_DEFINED(AT90CAN64) || \\r
+ AVR8_PART_IS_DEFINED(AT90PWM1) || \\r
+ AVR8_PART_IS_DEFINED(AT90PWM216) || \\r
+ AVR8_PART_IS_DEFINED(AT90PWM2B) || \\r
+ AVR8_PART_IS_DEFINED(AT90PWM316) || \\r
+ AVR8_PART_IS_DEFINED(AT90PWM3B) || \\r
+ AVR8_PART_IS_DEFINED(AT90PWM81) || \\r
+ AVR8_PART_IS_DEFINED(AT90USB1286) || \\r
+ AVR8_PART_IS_DEFINED(AT90USB1287) || \\r
+ AVR8_PART_IS_DEFINED(AT90USB162) || \\r
+ AVR8_PART_IS_DEFINED(AT90USB646) || \\r
+ AVR8_PART_IS_DEFINED(AT90USB647) || \\r
+ AVR8_PART_IS_DEFINED(AT90USB82) || \\r
+ AVR8_PART_IS_DEFINED(ATmega1284) || \\r
+ AVR8_PART_IS_DEFINED(ATmega162) || \\r
+ AVR8_PART_IS_DEFINED(ATmega164P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega165A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega165P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega165PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega168P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega169A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega16M1) || \\r
+ AVR8_PART_IS_DEFINED(ATmega16U2) || \\r
+ AVR8_PART_IS_DEFINED(ATmega16U4) || \\r
+ AVR8_PART_IS_DEFINED(ATmega2564RFR2) || \\r
+ AVR8_PART_IS_DEFINED(ATmega256RFA2) || \\r
+ AVR8_PART_IS_DEFINED(ATmega324P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega325) || \\r
+ AVR8_PART_IS_DEFINED(ATmega3250) || \\r
+ AVR8_PART_IS_DEFINED(ATmega3250A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega3250P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega3250PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega325A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega325P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega325PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega329) || \\r
+ AVR8_PART_IS_DEFINED(ATmega3290) || \\r
+ AVR8_PART_IS_DEFINED(ATmega3290A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega3290P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega3290PA) || \\r
+ AVR8_PART_IS_DEFINED(ATmega329A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega32M1) || \\r
+ AVR8_PART_IS_DEFINED(ATmega32U2) || \\r
+ AVR8_PART_IS_DEFINED(ATmega32U4) || \\r
+ AVR8_PART_IS_DEFINED(ATmega48P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega644P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega645) || \\r
+ AVR8_PART_IS_DEFINED(ATmega6450) || \\r
+ AVR8_PART_IS_DEFINED(ATmega6450A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega6450P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega645A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega645P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega649) || \\r
+ AVR8_PART_IS_DEFINED(ATmega6490) || \\r
+ AVR8_PART_IS_DEFINED(ATmega6490A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega6490P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega649A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega649P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega64M1) || \\r
+ AVR8_PART_IS_DEFINED(ATmega64RFA2) || \\r
+ AVR8_PART_IS_DEFINED(ATmega8) || \\r
+ AVR8_PART_IS_DEFINED(ATmega8515) || \\r
+ AVR8_PART_IS_DEFINED(ATmega8535) || \\r
+ AVR8_PART_IS_DEFINED(ATmega88P) || \\r
+ AVR8_PART_IS_DEFINED(ATmega8A) || \\r
+ AVR8_PART_IS_DEFINED(ATmega8U2) \\r
+ )\r
+\r
+/** Unspecified group */\r
+#define MEGA_UNSPECIFIED (MEGA_XX_UN0 || MEGA_XX_UN1 || MEGA_XX_UN2 || \\r
+ MEGA_UNCATEGORIZED)\r
+\r
+/** @} */\r
+\r
+/** megaAVR product line */\r
+#define MEGA (MEGA_XX0_1 || MEGA_XX4 || MEGA_XX8 || MEGA_XX || MEGA_RF || \\r
+ MEGA_UNSPECIFIED)\r
+\r
+/** @} */\r
+\r
+/**\r
+ * \defgroup tiny_part_macros_group tinyAVR parts\r
+ *\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \name tinyAVR groups\r
+ * @{\r
+ */\r
+\r
+/** Devices added to complete tinyAVR offering.\r
+ * Please do not use this group symbol as it is not intended\r
+ * to be permanent: the devices should be regrouped.\r
+ */\r
+#define TINY_UNCATEGORIZED ( \\r
+ AVR8_PART_IS_DEFINED(ATtiny10) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny13) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny13A) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny1634) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny167) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny20) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny2313) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny2313A) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny24) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny24A) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny25) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny26) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny261) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny261A) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny4) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny40) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny4313) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny43U) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny44) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny44A) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny45) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny461) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny461A) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny48) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny5) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny828) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny84) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny84A) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny85) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny861) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny861A) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny87) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny88) || \\r
+ AVR8_PART_IS_DEFINED(ATtiny9) \\r
+ )\r
+\r
+/** @} */\r
+\r
+/** tinyAVR product line */\r
+#define TINY (TINY_UNCATEGORIZED)\r
+\r
+/** @} */\r
+\r
+/**\r
+ * \defgroup sam_part_macros_group SAM parts\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \name SAM3S series\r
+ * @{\r
+ */\r
+#define SAM3S1 ( \\r
+ SAM_PART_IS_DEFINED(SAM3S1A) || \\r
+ SAM_PART_IS_DEFINED(SAM3S1B) || \\r
+ SAM_PART_IS_DEFINED(SAM3S1C) \\r
+ )\r
+\r
+#define SAM3S2 ( \\r
+ SAM_PART_IS_DEFINED(SAM3S2A) || \\r
+ SAM_PART_IS_DEFINED(SAM3S2B) || \\r
+ SAM_PART_IS_DEFINED(SAM3S2C) \\r
+ )\r
+\r
+#define SAM3S4 ( \\r
+ SAM_PART_IS_DEFINED(SAM3S4A) || \\r
+ SAM_PART_IS_DEFINED(SAM3S4B) || \\r
+ SAM_PART_IS_DEFINED(SAM3S4C) \\r
+ )\r
+\r
+#define SAM3S8 ( \\r
+ SAM_PART_IS_DEFINED(SAM3S8B) || \\r
+ SAM_PART_IS_DEFINED(SAM3S8C) \\r
+ )\r
+\r
+#define SAM3SD8 ( \\r
+ SAM_PART_IS_DEFINED(SAM3SD8B) || \\r
+ SAM_PART_IS_DEFINED(SAM3SD8C) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name SAM3U series\r
+ * @{\r
+ */\r
+#define SAM3U1 ( \\r
+ SAM_PART_IS_DEFINED(SAM3U1C) || \\r
+ SAM_PART_IS_DEFINED(SAM3U1E) \\r
+ )\r
+\r
+#define SAM3U2 ( \\r
+ SAM_PART_IS_DEFINED(SAM3U2C) || \\r
+ SAM_PART_IS_DEFINED(SAM3U2E) \\r
+ )\r
+\r
+#define SAM3U4 ( \\r
+ SAM_PART_IS_DEFINED(SAM3U4C) || \\r
+ SAM_PART_IS_DEFINED(SAM3U4E) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name SAM3N series\r
+ * @{\r
+ */\r
+#define SAM3N1 ( \\r
+ SAM_PART_IS_DEFINED(SAM3N1A) || \\r
+ SAM_PART_IS_DEFINED(SAM3N1B) || \\r
+ SAM_PART_IS_DEFINED(SAM3N1C) \\r
+ )\r
+\r
+#define SAM3N2 ( \\r
+ SAM_PART_IS_DEFINED(SAM3N2A) || \\r
+ SAM_PART_IS_DEFINED(SAM3N2B) || \\r
+ SAM_PART_IS_DEFINED(SAM3N2C) \\r
+ )\r
+\r
+#define SAM3N4 ( \\r
+ SAM_PART_IS_DEFINED(SAM3N4A) || \\r
+ SAM_PART_IS_DEFINED(SAM3N4B) || \\r
+ SAM_PART_IS_DEFINED(SAM3N4C) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name SAM3X series\r
+ * @{\r
+ */\r
+#define SAM3X4 ( \\r
+ SAM_PART_IS_DEFINED(SAM3X4C) || \\r
+ SAM_PART_IS_DEFINED(SAM3X4E) \\r
+ )\r
+\r
+#define SAM3X8 ( \\r
+ SAM_PART_IS_DEFINED(SAM3X8C) || \\r
+ SAM_PART_IS_DEFINED(SAM3X8E) || \\r
+ SAM_PART_IS_DEFINED(SAM3X8H) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name SAM3A series\r
+ * @{\r
+ */\r
+#define SAM3A4 ( \\r
+ SAM_PART_IS_DEFINED(SAM3A4C) \\r
+ )\r
+\r
+#define SAM3A8 ( \\r
+ SAM_PART_IS_DEFINED(SAM3A8C) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name SAM4S series\r
+ * @{\r
+ */\r
+#define SAM4S8 ( \\r
+ SAM_PART_IS_DEFINED(SAM4S8B) || \\r
+ SAM_PART_IS_DEFINED(SAM4S8C) \\r
+ )\r
+\r
+#define SAM4S16 ( \\r
+ SAM_PART_IS_DEFINED(SAM4S16B) || \\r
+ SAM_PART_IS_DEFINED(SAM4S16C) \\r
+ )\r
+\r
+#define SAM4SA16 ( \\r
+ SAM_PART_IS_DEFINED(SAM4SA16B) || \\r
+ SAM_PART_IS_DEFINED(SAM4SA16C) \\r
+ )\r
+\r
+#define SAM4SD16 ( \\r
+ SAM_PART_IS_DEFINED(SAM4SD16B) || \\r
+ SAM_PART_IS_DEFINED(SAM4SD16C) \\r
+ )\r
+\r
+#define SAM4SD32 ( \\r
+ SAM_PART_IS_DEFINED(SAM4SD32B) || \\r
+ SAM_PART_IS_DEFINED(SAM4SD32C) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name SAM4L series\r
+ * @{\r
+ */\r
+#define SAM4LS ( \\r
+ SAM_PART_IS_DEFINED(SAM4LS2A) || \\r
+ SAM_PART_IS_DEFINED(SAM4LS2B) || \\r
+ SAM_PART_IS_DEFINED(SAM4LS2C) || \\r
+ SAM_PART_IS_DEFINED(SAM4LS4A) || \\r
+ SAM_PART_IS_DEFINED(SAM4LS4B) || \\r
+ SAM_PART_IS_DEFINED(SAM4LS4C) \\r
+ )\r
+\r
+#define SAM4LC ( \\r
+ SAM_PART_IS_DEFINED(SAM4LC2A) || \\r
+ SAM_PART_IS_DEFINED(SAM4LC2B) || \\r
+ SAM_PART_IS_DEFINED(SAM4LC2C) || \\r
+ SAM_PART_IS_DEFINED(SAM4LC4A) || \\r
+ SAM_PART_IS_DEFINED(SAM4LC4B) || \\r
+ SAM_PART_IS_DEFINED(SAM4LC4C) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name SAM4E series\r
+ * @{\r
+ */\r
+#define SAM4E8 ( \\r
+ SAM_PART_IS_DEFINED(SAM4E8E) \\r
+ )\r
+\r
+#define SAM4E16 ( \\r
+ SAM_PART_IS_DEFINED(SAM4E16E) \\r
+ )\r
+/** @} */\r
+\r
+/**\r
+ * \name SAM families\r
+ * @{\r
+ */\r
+/** SAM3S Family */\r
+#define SAM3S (SAM3S1 || SAM3S2 || SAM3S4 || SAM3S8 || SAM3SD8)\r
+\r
+/** SAM3U Family */\r
+#define SAM3U (SAM3U1 || SAM3U2 || SAM3U4)\r
+\r
+/** SAM3N Family */\r
+#define SAM3N (SAM3N1 || SAM3N2 || SAM3N4)\r
+\r
+/** SAM3XA Family */\r
+#define SAM3XA (SAM3X4 || SAM3X8 || SAM3A4 || SAM3A8)\r
+\r
+/** SAM4S Family */\r
+#define SAM4S (SAM4S8 || SAM4S16 || SAM4SA16 || SAM4SD16 || SAM4SD32)\r
+\r
+/** SAM4L Family */\r
+#define SAM4L (SAM4LS || SAM4LC)\r
+\r
+/** SAM4E Family */\r
+#define SAM4E (SAM4E8 || SAM4E16)\r
+/** @} */\r
+\r
+/** SAM product line */\r
+#define SAM (SAM3S || SAM3U || SAM3N || SAM3XA || SAM4S || SAM4L || SAM4E)\r
+\r
+/** @} */\r
+\r
+/** @} */\r
+\r
+/** @} */\r
+\r
+#endif /* ATMEL_PARTS_H */\r
projects / freertos / blobdiff