Add M7/M4 AMP demo.

[freertos] / FreeRTOS / Demo / CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR / ST_code / BSP / STM32H745I-Discovery / stm32h745i_discovery_sdram.h

diff --git a/FreeRTOS/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/ST_code/BSP/STM32H745I-Discovery/stm32h745i_discovery_sdram.h b/FreeRTOS/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/ST_code/BSP/STM32H745I-Discovery/stm32h745i_discovery_sdram.h
new file mode 100644 (file)
index 0000000..d087d02
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M7_M4_AMP_STM32H745I_Discovery_IAR/ST_code/BSP/STM32H745I-Discovery/stm32h745i_discovery_sdram.h
@@ -0,0 +1,133 @@
+/**\r
+  ******************************************************************************\r
+  * @file    stm32h745i_discovery_sdram.h\r
+  * @author  MCD Application Team\r
+  * @brief   This file contains the common defines and functions prototypes for\r
+  *          the stm32h745i_discovery_sdram.c driver.\r
+  ******************************************************************************\r
+  * @attention\r
+  *\r
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.\r
+  * All rights reserved.</center></h2>\r
+  *\r
+  * This software component is licensed by ST under BSD 3-Clause license,\r
+  * the "License"; You may not use this file except in compliance with the\r
+  * License. You may obtain a copy of the License at:\r
+  *                        opensource.org/licenses/BSD-3-Clause\r
+  *\r
+  ******************************************************************************\r
+  */ \r
+\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef __STM32H745I_DISCOVERY_SDRAM_H\r
+#define __STM32H745I_DISCOVERY_SDRAM_H\r
+\r
+#ifdef __cplusplus\r
+ extern "C" {\r
+#endif \r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32h7xx_hal.h"\r
+\r
+/** @addtogroup BSP\r
+  * @{\r
+  */ \r
+\r
+/** @addtogroup STM32H745I_DISCOVERY\r
+  * @{\r
+  */\r
+    \r
+/** @addtogroup STM32H745I_DISCOVERY_SDRAM\r
+  * @{\r
+  */    \r
+\r
+/** @defgroup STM32H745I_DISCOVERY_SDRAM_Exported_Constants Exported Constants\r
+  * @{\r
+  */ \r
+\r
+/** \r
+  * @brief  SDRAM status structure definition  \r
+  */     \r
+#define   SDRAM_OK         ((uint8_t)0x00)\r
+#define   SDRAM_ERROR      ((uint8_t)0x01)\r
+\r
+#define SDRAM_DEVICE_ADDR  ((uint32_t)0xD0000000)\r
+#define SDRAM_DEVICE_SIZE  ((uint32_t)0x2000000)  /* SDRAM device size in MBytes */\r
+\r
+/* #define SDRAM_MEMORY_WIDTH            FMC_SDRAM_MEM_BUS_WIDTH_8  */\r
+#define SDRAM_MEMORY_WIDTH            FMC_SDRAM_MEM_BUS_WIDTH_16 \r
+/* #define SDRAM_MEMORY_WIDTH               FMC_SDRAM_MEM_BUS_WIDTH_32 */\r
+\r
+#define SDCLOCK_PERIOD                   FMC_SDRAM_CLOCK_PERIOD_2\r
+/* #define SDCLOCK_PERIOD                FMC_SDRAM_CLOCK_PERIOD_3 */   \r
+\r
+#define REFRESH_COUNT                    ((uint32_t)0x0603)   /* SDRAM refresh counter (100Mhz SD clock) */\r
+   \r
+#define SDRAM_TIMEOUT                    ((uint32_t)0xFFFF)\r
+\r
+/* DMA definitions for SDRAM DMA transfer */\r
+#define __MDMAx_CLK_ENABLE                 __HAL_RCC_MDMA_CLK_ENABLE\r
+#define __MDMAx_CLK_DISABLE                __HAL_RCC_MDMA_CLK_DISABLE\r
+#define SDRAM_MDMAx_CHANNEL               MDMA_Channel0  \r
+#define SDRAM_MDMAx_IRQn                  MDMA_IRQn\r
+  \r
+/**\r
+  * @brief  FMC SDRAM Mode definition register defines\r
+  */\r
+#define SDRAM_MODEREG_BURST_LENGTH_1             ((uint16_t)0x0000)\r
+#define SDRAM_MODEREG_BURST_LENGTH_2             ((uint16_t)0x0001)\r
+#define SDRAM_MODEREG_BURST_LENGTH_4             ((uint16_t)0x0002)\r
+#define SDRAM_MODEREG_BURST_LENGTH_8             ((uint16_t)0x0004)\r
+#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL      ((uint16_t)0x0000)\r
+#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED     ((uint16_t)0x0008)\r
+#define SDRAM_MODEREG_CAS_LATENCY_2              ((uint16_t)0x0020)\r
+#define SDRAM_MODEREG_CAS_LATENCY_3              ((uint16_t)0x0030)\r
+#define SDRAM_MODEREG_OPERATING_MODE_STANDARD    ((uint16_t)0x0000)\r
+#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000) \r
+#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE     ((uint16_t)0x0200) \r
+/**\r
+  * @}\r
+  */ \r
+  \r
+   \r
+/** @defgroup STM32H745I_DISCOVERY_SDRAM_Exported_Functions Exported Functions\r
+  * @{\r
+  */  \r
+uint8_t BSP_SDRAM_Init(void);\r
+uint8_t BSP_SDRAM_DeInit(void);\r
+void    BSP_SDRAM_Initialization_sequence(uint32_t RefreshCount);\r
+uint8_t BSP_SDRAM_ReadData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);\r
+uint8_t BSP_SDRAM_ReadData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);\r
+uint8_t BSP_SDRAM_WriteData(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);\r
+uint8_t BSP_SDRAM_WriteData_DMA(uint32_t uwStartAddress, uint32_t *pData, uint32_t uwDataSize);\r
+uint8_t BSP_SDRAM_Sendcmd(FMC_SDRAM_CommandTypeDef *SdramCmd);\r
+   \r
+/* These functions can be modified in case the current settings (e.g. DMA stream)\r
+   need to be changed for specific application needs */\r
+void    BSP_SDRAM_MspInit(SDRAM_HandleTypeDef  *hsdram, void *Params);\r
+void    BSP_SDRAM_MspDeInit(SDRAM_HandleTypeDef  *hsdram, void *Params);\r
+\r
+\r
+/**\r
+  * @}\r
+  */ \r
+\r
+/**\r
+  * @}\r
+  */ \r
+\r
+/**\r
+  * @}\r
+  */ \r
+\r
+/**\r
+  * @}\r
+  */ \r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* __STM32H745I_DISCOVERY_SDRAM_H */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r