--- /dev/null
+/*****************************************************************************\r
+* Copyright 2014 Microchip Technology Inc. and its subsidiaries.\r
+* You may use this software and any derivatives exclusively with\r
+* Microchip products.\r
+* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".\r
+* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,\r
+* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,\r
+* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP\r
+* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.\r
+* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,\r
+* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND\r
+* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS\r
+* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.\r
+* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL\r
+* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF\r
+* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.\r
+* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE\r
+* OF THESE TERMS.\r
+*****************************************************************************/\r
+\r
+/** @file girqs.c\r
+ *MEC14xx JTVIC default configuration table\r
+ */\r
+/** @defgroup MEC140x ISR\r
+ * @{\r
+ */\r
+\r
+#include "appcfg.h"\r
+#include "platform.h"\r
+#include "MEC14xx/mec14xx.h"\r
+#include "MEC14xx/mec14xx_girqm.h"\r
+#include "MEC14xx/mec14xx_girqs.h"\r
+#include "MEC14xx/mec14xx_gpio.h"\r
+#include "MEC14xx/mec14xx_trace_func.h"\r
+\r
+\r
+/*\r
+ * Interrupt Service Routine prototypes for each GIRQn\r
+*/\r
+\r
+\r
+/*\r
+ * Table for initializing MEC14xx JTVIC.\r
+ * Each GIRQn handler's address must be programmed into\r
+ * respective JTVIC register.\r
+ */\r
+const JTVIC_CFG dflt_ih_table[MEC14xx_NUM_JTVIC_INTS] = {\r
+ {\r
+ (uint32_t)girq08_isr,\r
+ {\r
+ (GIRQ08_PRI_A),\r
+ (GIRQ08_PRI_B),\r
+ (GIRQ08_PRI_C),\r
+ (GIRQ08_PRI_D)\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq09_isr,\r
+ {\r
+ (GIRQ09_PRI_A),\r
+ (GIRQ09_PRI_B),\r
+ (GIRQ09_PRI_C),\r
+ (GIRQ09_PRI_D)\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq10_isr,\r
+ {\r
+ (GIRQ10_PRI_A),\r
+ (GIRQ10_PRI_B),\r
+ (GIRQ10_PRI_C),\r
+ (GIRQ10_PRI_D)\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq11_isr,\r
+ {\r
+ GIRQ11_PRI_A,\r
+ GIRQ11_PRI_B,\r
+ GIRQ11_PRI_C,\r
+ GIRQ11_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq12_isr,\r
+ {\r
+ GIRQ12_PRI_A,\r
+ GIRQ12_PRI_B,\r
+ GIRQ12_PRI_C,\r
+ GIRQ12_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq13_isr,\r
+ {\r
+ GIRQ13_PRI_A,\r
+ GIRQ13_PRI_B,\r
+ GIRQ13_PRI_C,\r
+ GIRQ13_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq14_isr,\r
+ {\r
+ GIRQ14_PRI_A,\r
+ GIRQ14_PRI_B,\r
+ GIRQ14_PRI_C,\r
+ GIRQ14_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq15_isr,\r
+ {\r
+ GIRQ15_PRI_A,\r
+ GIRQ15_PRI_B,\r
+ GIRQ15_PRI_C,\r
+ GIRQ15_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq16_isr,\r
+ {\r
+ GIRQ16_PRI_A,\r
+ GIRQ16_PRI_B,\r
+ GIRQ16_PRI_C,\r
+ GIRQ16_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq17_isr,\r
+ {\r
+ GIRQ17_PRI_A,\r
+ GIRQ17_PRI_B,\r
+ GIRQ17_PRI_C,\r
+ GIRQ17_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq18_isr,\r
+ {\r
+ GIRQ18_PRI_A,\r
+ GIRQ18_PRI_B,\r
+ GIRQ18_PRI_C,\r
+ GIRQ18_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq19_isr,\r
+ {\r
+ GIRQ19_PRI_A,\r
+ GIRQ19_PRI_B,\r
+ GIRQ19_PRI_C,\r
+ GIRQ19_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq20_isr,\r
+ {\r
+ GIRQ20_PRI_A,\r
+ GIRQ20_PRI_B,\r
+ GIRQ20_PRI_C,\r
+ GIRQ20_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq21_isr,\r
+ {\r
+ GIRQ21_PRI_A,\r
+ GIRQ21_PRI_B,\r
+ GIRQ21_PRI_C,\r
+ GIRQ21_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq22_isr,\r
+ {\r
+ GIRQ22_PRI_A,\r
+ GIRQ22_PRI_B,\r
+ GIRQ22_PRI_C,\r
+ GIRQ22_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq23_isr,\r
+ {\r
+ GIRQ23_PRI_A,\r
+ GIRQ23_PRI_B,\r
+ GIRQ23_PRI_C,\r
+ GIRQ23_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq24_isr,\r
+ {\r
+ GIRQ24_PRI_A,\r
+ GIRQ24_PRI_B,\r
+ GIRQ24_PRI_C,\r
+ GIRQ24_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq25_isr,\r
+ {\r
+ GIRQ25_PRI_A,\r
+ GIRQ25_PRI_B,\r
+ GIRQ25_PRI_C,\r
+ GIRQ25_PRI_D\r
+ }\r
+ },\r
+ {\r
+ (uint32_t)girq26_isr,\r
+ {\r
+ GIRQ26_PRI_A,\r
+ GIRQ26_PRI_B,\r
+ GIRQ26_PRI_C,\r
+ GIRQ26_PRI_D\r
+ }\r
+ }\r
+};\r
+\r
+\r
+/* end girqs.c */\r
+/** @}\r
+ */\r
+\r
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