--- /dev/null
+/*****************************************************************************\r
+* © 2014 Microchip Technology Inc. and its subsidiaries.\r
+* You may use this software and any derivatives exclusively with\r
+* Microchip products.\r
+* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".\r
+* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,\r
+* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,\r
+* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP\r
+* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.\r
+* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,\r
+* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND\r
+* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS\r
+* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.\r
+* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL\r
+* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF\r
+* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.\r
+* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE\r
+* OF THESE TERMS.\r
+*****************************************************************************/\r
+\r
+/** @file platform.h\r
+ *MEC14xx platform/cpu abstractions\r
+ */\r
+/** @defgroup MEC14xx\r
+ */\r
+\r
+#ifndef _PLATFORM_H\r
+#define _PLATFORM_H\r
+\r
+#if defined(__GNUC__) && defined(__mips__)\r
+\r
+#if defined(__XC32__) // Microchip XC32 GCC\r
+\r
+/* Pull in MIPS32 specific special instructions instrinsics for\r
+ * interrupt control, NOP, Wait-for-Interrupt and accessing\r
+ * MSR's.\r
+ * Issue: MPLAB-X IDE editor and the CPU macros in xc.h & cp0defs.h.\r
+ * The IDE editor will show red ! on every line of code using the above\r
+ * macros due to a bug in the IDE's C language preprocessor.\r
+ */\r
+#include <xc.h>\r
+\r
+#define CPU_DISABLE_INTERRUPTS() __builtin_disable_interrupts()\r
+#define CPU_GET_DISABLE_INTERRUPTS(x) { x=_CP0_GET_STATUS()&0x1ul; __builtin_disable_interrupts() }\r
+#define CPU_ENABLE_INTERRUPTS() __builtin_enable_interrupts()\r
+#define CPU_RESTORE_INTERRUPTS(x) { if (x) { __builtin_enable_interrupts(); } }\r
+\r
+#define Disable_Irq() CPU_DISABLE_INTERRUPTS()\r
+#define Enable_Irq() CPU_ENABLE_INTERRUPTS()\r
+\r
+#define __CLZ(x) __builtin_clz(x)\r
+#define __CTZ(x) __builtin_ctz (x)\r
+#define __CLO(x) _clo(x)\r
+\r
+#define __INS(tgt,val,pos,sz) _ins(tgt,val,pos,sz)\r
+#define __EXT(x,pos,sz) _ext(x,pos,sz)\r
+\r
+#define CPU_NOP() __asm__ __volatile ("%(ssnop%)" : :)\r
+\r
+#define CPU_WAIT_FOR_INTR() __asm__ __volatile ("wait")\r
+\r
+#define __REV(x) _bswapw(x)\r
+\r
+#define __EHB() _ehb()\r
+\r
+#else\r
+\r
+/* Include MIPS specific inline assembly functions for accessing\r
+ * MIPS CP0 registers, NOP, WAIT, ASET, ACLR, byte-reverse, etc.\r
+ */\r
+#include "mipscpu.h"\r
+\r
+\r
+#define CPU_DISABLE_INTERRUPTS() mips32r2_dis_intr()\r
+#define CPU_GET_DISABLE_INTERRUPTS(x) x=mips32r2_dis_intr()\r
+#define CPU_ENABLE_INTERRUPTS() mips32r2_en_intr()\r
+#define CPU_RESTORE_INTERRUPTS(x) mips32r2_restore_intr(x)\r
+\r
+#define Disable_Irq() CPU_DISABLE_INTERRUPTS()\r
+#define Enable_Irq() CPU_ENABLE_INTERRUPTS()\r
+\r
+#define __CLZ(x) __builtin_clz(x)\r
+#define __CTZ(x) __builtin_ctz (x)\r
+\r
+#define __CLO(x) __extension__({ \\r
+ unsigned int __x = (x); \\r
+ unsigned int __v; \\r
+ __asm__ ("clo %0,%1" : "=d" (__v) : "d" (__x)); \\r
+ __v; \\r
+})\r
+\r
+/* MIPS32r2 insert bits */\r
+#define __INS(tgt,val,pos,sz) __extension__({ \\r
+ unsigned int __t = (tgt), __v = (val); \\r
+ __asm__ ("ins %0,%z1,%2,%3" \\r
+ : "+d" (__t) \\r
+ : "dJ" (__v), "I" (pos), "I" (sz)); \\r
+ __t; \\r
+})\r
+\r
+/* MIPS32r2 extract bits */\r
+#define __EXT(x,pos,sz) __extension__({ \\r
+ unsigned int __x = (x), __v; \\r
+ __asm__ ("ext %0,%z1,%2,%3" \\r
+ : "=d" (__v) \\r
+ : "dJ" (__x), "I" (pos), "I" (sz)); \\r
+ __v; \\r
+})\r
+\r
+#define CPU_NOP() __asm__ __volatile ("%(ssnop%)" : :)\r
+\r
+#define CPU_WAIT_FOR_INTR() __asm__ __volatile ("wait")\r
+\r
+#define __REV(x) mips32r2_rev_word(x)\r
+\r
+#define __EHB() __asm__ __volatile__ ("%(ehb%)" : :)\r
+\r
+#define _CP0_GET_BADVADDR() mips32r2_cp0_badvaddr_get()\r
+\r
+#define _CP0_GET_COUNT() mips32r2_cp0_count_get()\r
+#define _CP0_SET_COUNT(val) mips32r2_cp0_count_set((unsigned long)val)\r
+\r
+#define _CP0_GET_COMPARE() mips32r2_cp0_compare_get()\r
+#define _CP0_SET_COMPARE(val) mips32r2_cp0_compare_set((unsigned long)val)\r
+\r
+#define _CP0_GET_STATUS() mips32r2_cp0_status_get()\r
+#define _CP0_SET_STATUS(val) mips32r2_cp0_status_set((unsigned long)val)\r
+#define _CP0_BIC_STATUS(val) mips32r2_cp0_status_bic(val)\r
+#define _CP0_BIS_STATUS(val) mips32r2_cp0_status_bis(val)\r
+\r
+#define _CP0_GET_INTCTL() mips32r2_cp0_intctl_get()\r
+#define _CP0_SET_INTCTL(val) mips32r2_cp0_intctl_set((unsigned long)val)\r
+\r
+#define _CP0_GET_VIEW_IPL() mips32r2_cp0_view_ipl_get()\r
+#define _CP0_SET_VIEW_IPL(val) mips32r2_cp0_view_ipl_set((unsigned long)val)\r
+\r
+#define _CP0_GET_CAUSE() mips32r2_cp0_cause_get()\r
+#define _CP0_SET_CAUSE(val) mips32r2_cp0_cause_set((unsigned long)val)\r
+#define _CP0_BIC_CAUSE(val) mips32r2_cp0_cause_bic((unsigned long)val)\r
+#define _CP0_BIS_CAUSE(val) mips32r2_cp0_cause_bis((unsigned long)val)\r
+\r
+#define _CP0_GET_VIEW_RIPL() mips32r2_cp0_view_ripl_get()\r
+#define _CP0_SET_VIEW_RIPL(val) mips32r2_cp0_view_ripl_set((unsigned long)val)\r
+\r
+#define _CP0_GET_EPC() mips32r2_cp0_epc_get()\r
+#define _CP0_SET_EPC(val) mips32r2_cp0_epc_set((unsigned long)val)\r
+\r
+#define _CP0_GET_EBASE() mips32r2_cp0_ebase_get()\r
+#define _CP0_SET_EBASE(val) mips32r2_cp0_ebase_set((unsigned long)val)\r
+\r
+#define _CP0_GET_CONFIG() mips32r2_cp0_config_get()\r
+#define _CP0_GET_CONFIG3() mips32r2_cp0_config3_get()\r
+\r
+#define _CP0_GET_DEPC() mips32r2_cp0_depc_get()\r
+\r
+#endif\r
+\r
+#else // Any other compiler\r
+\r
+#error "FORCED BUILD ERROR: Unknown compiler"\r
+\r
+#endif\r
+\r
+/*\r
+Need to define NULL\r
+*/\r
+#ifndef NULL\r
+ #ifdef __CPLUSPLUS__\r
+ #define NULL 0\r
+ #else\r
+ #define NULL ((void *)0)\r
+ #endif\r
+#endif\r
+\r
+#endif // #ifndef _PLATFORM_H\r
+/** @}\r
+ */\r
projects / freertos / blobdiff