]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Source/portable/GCC/ARM_CM33/non_secure/portmacro.h
Add Cortex M23 GCC and IAR ports. Add demo projects for Nuvoton NuMaker-PFM-2351.
[freertos] / FreeRTOS / Source / portable / GCC / ARM_CM33 / non_secure / portmacro.h
index 4bd9a6f50534c197b1c057132245fa7ec44378a5..aacb3875d9c802288afda0431249f4bc372e06c1 100644 (file)
@@ -43,16 +43,17 @@ extern "C" {
  */\r
 \r
 #ifndef configENABLE_FPU\r
-       #error configENABLE_FPU must be defined in FreeRTOSConfig.h.\r
+       #error configENABLE_FPU must be defined in FreeRTOSConfig.h.  Set configENABLE_FPU to 1 to enable the FPU or 0 to disable the FPU.\r
 #endif /* configENABLE_FPU */\r
 \r
 #ifndef configENABLE_MPU\r
-       #error configENABLE_MPU must be defined in FreeRTOSConfig.h.\r
+       #error configENABLE_MPU must be defined in FreeRTOSConfig.h.  Set configENABLE_MPU to 1 to enable the MPU or 0 to disable the MPU.\r
 #endif /* configENABLE_MPU */\r
 \r
 #ifndef configENABLE_TRUSTZONE\r
-       #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.\r
+       #error configENABLE_TRUSTZONE must be defined in FreeRTOSConfig.h.  Set configENABLE_TRUSTZONE to 1 to enable TrustZone or 0 to disable TrustZone.\r
 #endif /* configENABLE_TRUSTZONE */\r
+\r
 /*-----------------------------------------------------------*/\r
 \r
 /**\r
@@ -86,6 +87,7 @@ typedef unsigned long                                                                         UBaseType_t;
 /**\r
  * Architecture specifics.\r
  */\r
+#define portARCH_NAME                                                                          "Cortex-M33"\r
 #define portSTACK_GROWTH                                                                       ( -1 )\r
 #define portTICK_PERIOD_MS                                                                     ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 #define portBYTE_ALIGNMENT                                                                     8\r
@@ -133,18 +135,14 @@ extern void vClearInterruptMaskFromISR( uint32_t ulMask ) /* __attribute__(( nak
 /* MPU regions. */\r
 #define portPRIVILEGED_FLASH_REGION                                                    ( 0UL )\r
 #define portUNPRIVILEGED_FLASH_REGION                                          ( 1UL )\r
-#define portPRIVILEGED_RAM_REGION                                                      ( 2UL )\r
-#define portUNPRIVILEGED_DEVICE_REGION                                         ( 3UL )\r
+#define portUNPRIVILEGED_SYSCALLS_REGION                                       ( 2UL )\r
+#define portPRIVILEGED_RAM_REGION                                                      ( 3UL )\r
 #define portSTACK_REGION                                                                       ( 4UL )\r
 #define portFIRST_CONFIGURABLE_REGION                                          ( 5UL )\r
 #define portLAST_CONFIGURABLE_REGION                                           ( 7UL )\r
 #define portNUM_CONFIGURABLE_REGIONS                                           ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )\r
 #define portTOTAL_NUM_REGIONS                                                          ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */\r
 \r
-/* Devices Region. */\r
-#define portDEVICE_REGION_START_ADDRESS                                                ( 0x50000000 )\r
-#define portDEVICE_REGION_END_ADDRESS                                          ( 0x5FFFFFFF )\r
-\r
 /* Device memory attributes used in MPU_MAIR registers.\r
  *\r
  * 8-bit values encoded as follows:\r
@@ -287,6 +285,12 @@ typedef struct MPU_SETTINGS
 #endif /* configENABLE_MPU */\r
 /*-----------------------------------------------------------*/\r
 \r
+/**\r
+ * @brief Barriers.\r
+ */\r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
+/*-----------------------------------------------------------*/\r
+\r
 #ifdef __cplusplus\r
 }\r
 #endif\r