Add support for running FreeRTOS on Secure Side only in Cortex M33 port. Also, change...

[freertos] / FreeRTOS / Source / portable / IAR / ARM_CM33 / secure / secure_context_port_asm.s

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s
index 69ff1a666e9486d4f85253bb43e602a2ff7f3cfe..08cb752fb616eb1efa741b211bc957e1f74731d0 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM33/secure/secure_context_port_asm.s
@@ -25,49 +25,49 @@
  * 1 tab == 4 spaces!\r
  */\r
 \r
-    SECTION .text:CODE:NOROOT(2)\r
-    THUMB\r
+       SECTION .text:CODE:NOROOT(2)\r
+       THUMB\r
 \r
-    PUBLIC SecureContext_LoadContextAsm\r
-    PUBLIC SecureContext_SaveContextAsm\r
+       PUBLIC SecureContext_LoadContextAsm\r
+       PUBLIC SecureContext_SaveContextAsm\r
 /*-----------------------------------------------------------*/\r
 \r
 SecureContext_LoadContextAsm:\r
-    /* xSecureContextHandle value is in r0. */\r
-    mrs r1, ipsr                            /* r1 = IPSR. */\r
-    cbz r1, load_ctx_therad_mode            /* Do nothing if the processor is running in the Thread Mode. */\r
-    ldmia r0!, {r1, r2}                     /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */\r
+       /* xSecureContextHandle value is in r0. */\r
+       mrs r1, ipsr                                                    /* r1 = IPSR. */\r
+       cbz r1, load_ctx_therad_mode                    /* Do nothing if the processor is running in the Thread Mode. */\r
+       ldmia r0!, {r1, r2}                                             /* r1 = xSecureContextHandle->pucCurrentStackPointer, r2 = xSecureContextHandle->pucStackLimit. */\r
 #if ( configENABLE_MPU == 1 )\r
-    ldmia r1!, {r3}                         /* Read CONTROL register value from task's stack. r3 = CONTROL. */\r
-    msr control, r3                         /* CONTROL = r3. */\r
+       ldmia r1!, {r3}                                                 /* Read CONTROL register value from task's stack. r3 = CONTROL. */\r
+       msr control, r3                                                 /* CONTROL = r3. */\r
 #endif /* configENABLE_MPU */\r
-    msr psplim, r2                          /* PSPLIM = r2. */\r
-    msr psp, r1                             /* PSP = r1. */\r
+       msr psplim, r2                                                  /* PSPLIM = r2. */\r
+       msr psp, r1                                                             /* PSP = r1. */\r
 \r
-    load_ctx_therad_mode:\r
-        bx lr\r
+       load_ctx_therad_mode:\r
+               bx lr\r
 /*-----------------------------------------------------------*/\r
 \r
 SecureContext_SaveContextAsm:\r
-    /* xSecureContextHandle value is in r0. */\r
-    mrs r1, ipsr                            /* r1 = IPSR. */\r
-    cbz r1, save_ctx_therad_mode            /* Do nothing if the processor is running in the Thread Mode. */\r
-    mrs r1, psp                             /* r1 = PSP. */\r
+       /* xSecureContextHandle value is in r0. */\r
+       mrs r1, ipsr                                                    /* r1 = IPSR. */\r
+       cbz r1, save_ctx_therad_mode                    /* Do nothing if the processor is running in the Thread Mode. */\r
+       mrs r1, psp                                                             /* r1 = PSP. */\r
 #if ( configENABLE_FPU == 1 )\r
-    vstmdb r1!, {s0}                        /* Trigger the defferred stacking of FPU registers. */\r
-    vldmia r1!, {s0}                        /* Nullify the effect of the pervious statement. */\r
+       vstmdb r1!, {s0}                                                /* Trigger the defferred stacking of FPU registers. */\r
+       vldmia r1!, {s0}                                                /* Nullify the effect of the pervious statement. */\r
 #endif /* configENABLE_FPU */\r
 #if ( configENABLE_MPU == 1 )\r
-    mrs r2, control                         /* r2 = CONTROL. */\r
-    stmdb r1!, {r2}                         /* Store CONTROL value on the stack. */\r
+       mrs r2, control                                                 /* r2 = CONTROL. */\r
+       stmdb r1!, {r2}                                                 /* Store CONTROL value on the stack. */\r
 #endif /* configENABLE_MPU */\r
-    str r1, [r0]                            /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */\r
-    movs r1, #0                             /* r1 = securecontextNO_STACK. */\r
-    msr psplim, r1                          /* PSPLIM = securecontextNO_STACK. */\r
-    msr psp, r1                             /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */\r
+       str r1, [r0]                                                    /* Save the top of stack in context. xSecureContextHandle->pucCurrentStackPointer = r1. */\r
+       movs r1, #0                                                             /* r1 = securecontextNO_STACK. */\r
+       msr psplim, r1                                                  /* PSPLIM = securecontextNO_STACK. */\r
+       msr psp, r1                                                             /* PSP = securecontextNO_STACK i.e. No stack for thread mode until next task's context is loaded. */\r
 \r
-    save_ctx_therad_mode:\r
-        bx lr\r
+       save_ctx_therad_mode:\r
+               bx lr\r
 /*-----------------------------------------------------------*/\r
 \r
-    END\r
+       END\r