--- /dev/null
+/*\r
+ FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+ All rights reserved\r
+\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
+\r
+ ***************************************************************************\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
+ ***************************************************************************\r
+\r
+ FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
+ FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
+ link: http://www.freertos.org/a00114.html\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that is more than just the market leader, it *\r
+ * is the industry's de facto standard. *\r
+ * *\r
+ * Help yourself get started quickly while simultaneously helping *\r
+ * to support the FreeRTOS project by purchasing a FreeRTOS *\r
+ * tutorial book, reference manual, or both: *\r
+ * http://www.FreeRTOS.org/Documentation *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
+ the FAQ page "My application does not run, what could be wrong?". Have you\r
+ defined configASSERT()?\r
+\r
+ http://www.FreeRTOS.org/support - In return for receiving this top quality\r
+ embedded software for free we request you assist our global community by\r
+ participating in the support forum.\r
+\r
+ http://www.FreeRTOS.org/training - Investing in training allows your team to\r
+ be as productive as possible as early as possible. Now you can receive\r
+ FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
+ Ltd, and the world's leading authority on the world's leading RTOS.\r
+\r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
+ Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
+ Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and commercial middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
+ mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Implementation of functions defined in portable.h for the PIC32MEC14xx port.\r
+ *----------------------------------------------------------*/\r
+\r
+/* Scheduler include files. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Microchip includes. */\r
+#include <xc.h>\r
+#include <cp0defs.h>\r
+\r
+#if !defined(__MEC__)\r
+ #error This port is designed to work with XC32 on MEC14xx. Please update your C compiler version or settings.\r
+#endif\r
+\r
+#if( ( configMAX_SYSCALL_INTERRUPT_PRIORITY >= 0x7 ) || ( configMAX_SYSCALL_INTERRUPT_PRIORITY == 0 ) )\r
+ #error configMAX_SYSCALL_INTERRUPT_PRIORITY must be less than 7 and greater than 0\r
+#endif\r
+\r
+/* Bits within various registers. */\r
+#define portIE_BIT ( 0x00000001 )\r
+#define portEXL_BIT ( 0x00000002 )\r
+\r
+/* The EXL bit is set to ensure interrupts do not occur while the context of\r
+the first task is being restored. MEC14xx does not have DSP HW. */\r
+#define portINITIAL_SR ( portIE_BIT | portEXL_BIT )\r
+\r
+/* MEC14xx RTOS Timer MMCR's. */\r
+#define portMMCR_RTMR_PRELOAD *((volatile uint32_t *)(0xA0007404ul))\r
+#define portMMCR_RTMR_CONTROL *((volatile uint32_t *)(0xA0007408ul))\r
+\r
+/* MEC14xx JTVIC external interrupt controller is mapped to M14K closely-coupled\r
+peripheral space. */\r
+#define portGIRQ23_RTOS_TIMER_BITPOS ( 4 )\r
+#define portGIRQ23_RTOS_TIMER_MASK ( 1ul << ( portGIRQ23_RTOS_TIMER_BITPOS ) )\r
+#define portMMCR_JTVIC_GIRQ23_SRC *((volatile uint32_t *)(0xBFFFC0F0ul))\r
+#define portMMCR_JTVIC_GIRQ23_SETEN *((volatile uint32_t *)(0xBFFFC0F4ul))\r
+#define portMMCR_JTVIC_GIRQ23_PRIA *((volatile uint32_t *)(0xBFFFC3F0ul))\r
+\r
+/* MIPS Software Interrupts are routed through JTVIC GIRQ24 */\r
+#define portGIRQ24_M14K_SOFTIRQ0_BITPOS ( 1 )\r
+#define portGIRQ24_M14K_SOFTIRQ0_MASK ( 1ul << ( portGIRQ24_M14K_SOFTIRQ0_BITPOS ) )\r
+#define portMMCR_JTVIC_GIRQ24_SRC *((volatile uint32_t *)(0xBFFFC100ul))\r
+#define portMMCR_JTVIC_GIRQ24_SETEN *((volatile uint32_t *)(0xBFFFC104ul))\r
+#define portMMCR_JTVIC_GIRQ24_PRIA *((volatile uint32_t *)(0xBFFFC400ul))\r
+\r
+/*\r
+By default port.c generates its tick interrupt from the RTOS timer. The user\r
+can override this behaviour by:\r
+ 1: Providing their own implementation of vApplicationSetupTickTimerInterrupt(),\r
+ which is the function that configures the timer. The function is defined\r
+ as a weak symbol in this file so if the same function name is used in the\r
+ application code then the version in the application code will be linked\r
+ into the application in preference to the version defined in this file.\r
+ 2: Provide a vector implementation in port_asm.S that overrides the default\r
+ behaviour for the specified interrupt vector.\r
+ 3: Specify the correct bit to clear the interrupt during the timer interrupt\r
+ handler.\r
+*/\r
+#ifndef configTICK_INTERRUPT_VECTOR\r
+ #define configTICK_INTERRUPT_VECTOR girq23_b4\r
+ #define configCLEAR_TICK_TIMER_INTERRUPT() portMMCR_JTVIC_GIRQ23_SRC = portGIRQ23_RTOS_TIMER_MASK\r
+#else\r
+ #ifndef configCLEAR_TICK_TIMER_INTERRUPT\r
+ #error If configTICK_INTERRUPT_VECTOR is defined in application code then configCLEAR_TICK_TIMER_INTERRUPT must also be defined in application code.\r
+ #endif\r
+#endif\r
+\r
+/* Let the user override the pre-loading of the initial RA with the address of\r
+prvTaskExitError() in case it messes up unwinding of the stack in the debugger -\r
+in which case configTASK_RETURN_ADDRESS can be defined as 0 (NULL). */\r
+#ifdef configTASK_RETURN_ADDRESS\r
+ #define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS\r
+#else\r
+ #define portTASK_RETURN_ADDRESS prvTaskExitError\r
+#endif\r
+\r
+/* Set configCHECK_FOR_STACK_OVERFLOW to 3 to add ISR stack checking to task\r
+stack checking. A problem in the ISR stack will trigger an assert, not call the\r
+stack overflow hook function (because the stack overflow hook is specific to a\r
+task stack, not the ISR stack). */\r
+#if( configCHECK_FOR_STACK_OVERFLOW > 2 )\r
+\r
+ /* Don't use 0xa5 as the stack fill bytes as that is used by the kernel for\r
+ the task stacks, and so will legitimately appear in many positions within\r
+ the ISR stack. */\r
+ #define portISR_STACK_FILL_BYTE 0xee\r
+\r
+ static const uint8_t ucExpectedStackBytes[] = {\r
+ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
+ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
+ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
+ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, \\r
+ portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE, portISR_STACK_FILL_BYTE }; \\r
+\r
+ #define portCHECK_ISR_STACK() configASSERT( ( memcmp( ( void * ) xISRStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) == 0 ) )\r
+#else\r
+ /* Define the function away. */\r
+ #define portCHECK_ISR_STACK()\r
+#endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Used to catch tasks that attempt to return from their implementing function.\r
+ */\r
+static void prvTaskExitError( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Records the interrupt nesting depth. This is initialised to one as it is\r
+decremented to 0 when the first task starts. */\r
+volatile UBaseType_t uxInterruptNesting = 0x01;\r
+\r
+/* Stores the task stack pointer when a switch is made to use the system stack. */\r
+UBaseType_t uxSavedTaskStackPointer = 0;\r
+\r
+/* The stack used by interrupt service routines that cause a context switch. */\r
+StackType_t xISRStack[ configISR_STACK_SIZE ] = { 0 };\r
+\r
+/* The top of stack value ensures there is enough space to store 6 registers on\r
+the callers stack, as some functions seem to want to do this. */\r
+const StackType_t * const xISRStackTop = &( xISRStack[ configISR_STACK_SIZE - 7 ] );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See header file for description.\r
+ */\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
+{\r
+ /* Ensure byte alignment is maintained when leaving this function. */\r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = (StackType_t) 0xDEADBEEF;\r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = (StackType_t) 0x12345678; /* Word to which the stack pointer will be left pointing after context restore. */\r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = (StackType_t) ulPortGetCP0Cause();\r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = (StackType_t) portINITIAL_SR; /* CP0_STATUS */\r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = (StackType_t) pxCode; /* CP0_EPC */\r
+ pxTopOfStack--;\r
+\r
+ *pxTopOfStack = (StackType_t) portTASK_RETURN_ADDRESS; /* ra */\r
+ pxTopOfStack -= 15;\r
+\r
+ *pxTopOfStack = (StackType_t) pvParameters; /* Parameters to pass in. */\r
+ pxTopOfStack -= 15;\r
+\r
+ return pxTopOfStack;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static __inline uint32_t prvDisableInterrupt( void )\r
+{\r
+uint32_t prev_state;\r
+\r
+ __asm volatile( "di %0; ehb" : "=r" ( prev_state ) :: "memory" );\r
+ return prev_state;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvTaskExitError( void )\r
+{\r
+ /* A function that implements a task must not exit or attempt to return to\r
+ its caller as there is nothing to return to. If a task wants to exit it\r
+ should instead call vTaskDelete( NULL ).\r
+\r
+ Artificially force an assert() to be triggered if configASSERT() is\r
+ defined, then stop here so application writers can catch the error. */\r
+ configASSERT( uxSavedTaskStackPointer == 0UL );\r
+ portDISABLE_INTERRUPTS();\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Setup a timer for a regular tick. This function uses the RTOS timer.\r
+ * The function is declared weak so an application writer can use a different\r
+ * timer by redefining this implementation. If a different timer is used then\r
+ * configTICK_INTERRUPT_VECTOR must also be defined in FreeRTOSConfig.h to\r
+ * ensure the RTOS provided tick interrupt handler is installed on the correct\r
+ * vector number.\r
+ */\r
+__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )\r
+{\r
+/* MEC14xx RTOS Timer whose input clock is 32KHz. */\r
+const uint32_t ulPreload = ( 32768ul / ( configTICK_RATE_HZ ) );\r
+\r
+ configASSERT( ulPreload != 0UL );\r
+\r
+ /* Configure the RTOS timer. */\r
+ portMMCR_RTMR_CONTROL = 0ul;\r
+ portMMCR_RTMR_PRELOAD = ulPreload;\r
+\r
+ /* Configure interrupts from the RTOS timer. */\r
+ portMMCR_JTVIC_GIRQ23_SRC = ( portGIRQ23_RTOS_TIMER_MASK );\r
+ portMMCR_JTVIC_GIRQ23_PRIA &= ~( 0x0Ful << 16 );\r
+ portMMCR_JTVIC_GIRQ23_PRIA |= ( ( portIPL_TO_CODE( configKERNEL_INTERRUPT_PRIORITY ) ) << 16 );\r
+ portMMCR_JTVIC_GIRQ23_SETEN = ( portGIRQ23_RTOS_TIMER_MASK );\r
+\r
+ /* Enable the RTOS timer. */\r
+ portMMCR_RTMR_CONTROL = 0x0Fu;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortEndScheduler(void)\r
+{\r
+ /* Not implemented in ports where there is nothing to return to.\r
+ Artificially force an assert. */\r
+ configASSERT( uxInterruptNesting == 1000UL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+BaseType_t xPortStartScheduler( void )\r
+{\r
+extern void vPortStartFirstTask( void );\r
+extern void *pxCurrentTCB;\r
+\r
+ #if ( configCHECK_FOR_STACK_OVERFLOW > 2 )\r
+ {\r
+ /* Fill the ISR stack to make it easy to asses how much is being used. */\r
+ memset( ( void * ) xISRStack, portISR_STACK_FILL_BYTE, sizeof( xISRStack ) );\r
+ }\r
+ #endif /* configCHECK_FOR_STACK_OVERFLOW > 2 */\r
+\r
+ /* Clear the software interrupt flag. */\r
+ portMMCR_JTVIC_GIRQ24_SRC = (portGIRQ24_M14K_SOFTIRQ0_MASK);\r
+\r
+ /* Set software timer priority. Each GIRQn has one nibble containing its\r
+ priority */\r
+ portMMCR_JTVIC_GIRQ24_PRIA &= ~(0xF0ul);\r
+ portMMCR_JTVIC_GIRQ24_PRIA |= ( portIPL_TO_CODE( configKERNEL_INTERRUPT_PRIORITY ) << 4 );\r
+\r
+ /* Enable software interrupt. */\r
+ portMMCR_JTVIC_GIRQ24_SETEN = ( portGIRQ24_M14K_SOFTIRQ0_MASK );\r
+\r
+ /* Setup the timer to generate the tick. Interrupts will have been disabled\r
+ by the time we get here. */\r
+ vApplicationSetupTickTimerInterrupt();\r
+\r
+ /* Start the highest priority task that has been created so far. Its stack\r
+ location is loaded into uxSavedTaskStackPointer. */\r
+ uxSavedTaskStackPointer = *( UBaseType_t * ) pxCurrentTCB;\r
+ vPortStartFirstTask();\r
+\r
+ /* Should never get here as the tasks will now be executing! Call the task\r
+ exit error function to prevent compiler warnings about a static function\r
+ not being called in the case that the application writer overrides this\r
+ functionality by defining configTASK_RETURN_ADDRESS. */\r
+ prvTaskExitError();\r
+\r
+ return pdFALSE;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortIncrementTick( void )\r
+{\r
+UBaseType_t uxSavedStatus;\r
+uint32_t ulCause;\r
+\r
+ uxSavedStatus = uxPortSetInterruptMaskFromISR();\r
+ {\r
+ if( xTaskIncrementTick() != pdFALSE )\r
+ {\r
+ /* Pend a context switch. */\r
+ ulCause = ulPortGetCP0Cause();\r
+ ulCause |= ( 1ul << 8UL );\r
+ vPortSetCP0Cause( ulCause );\r
+ }\r
+ }\r
+ vPortClearInterruptMaskFromISR( uxSavedStatus );\r
+\r
+ /* Look for the ISR stack getting near or past its limit. */\r
+ portCHECK_ISR_STACK();\r
+\r
+ /* Clear timer interrupt. */\r
+ configCLEAR_TICK_TIMER_INTERRUPT();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+UBaseType_t uxPortSetInterruptMaskFromISR( void )\r
+{\r
+UBaseType_t uxSavedStatusRegister;\r
+\r
+ prvDisableInterrupt();\r
+ uxSavedStatusRegister = ulPortGetCP0Status() | 0x01;\r
+\r
+ /* This clears the IPL bits, then sets them to\r
+ configMAX_SYSCALL_INTERRUPT_PRIORITY. This function should not be called\r
+ from an interrupt that has a priority above\r
+ configMAX_SYSCALL_INTERRUPT_PRIORITY so, when used correctly, the action\r
+ can only result in the IPL being unchanged or raised, and therefore never\r
+ lowered. */\r
+ vPortSetCP0Status( ( ( uxSavedStatusRegister & ( ~portALL_IPL_BITS ) ) ) | ( configMAX_SYSCALL_INTERRUPT_PRIORITY << portIPL_SHIFT ) );\r
+\r
+ return uxSavedStatusRegister;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vPortClearInterruptMaskFromISR( UBaseType_t uxSavedStatusRegister )\r
+{\r
+ vPortSetCP0Status( uxSavedStatusRegister );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+\r
+\r
+\r
+\r
projects / freertos / blobdiff