- i386 Files specific to i386 CPUs
- ixp Files specific to Intel XScale IXP CPUs
- mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
+ - mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
- mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
- mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs
+ - mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs
- mips Files specific to MIPS CPUs
- mpc5xx Files specific to Freescale MPC5xx CPUs
- mpc5xxx Files specific to Freescale MPC5xxx CPUs
CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
CONFIG_RTC_DS164x - use Dallas DS164x RTC
+ CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
Note that if the RTC uses I2C, then the I2C interface
SPI configuration items (port pins to use, etc). For
an example, see include/configs/sacsng.h.
+ CONFIG_HARD_SPI
+
+ Enables a hardware SPI driver for general-purpose reads
+ and writes. As with CONFIG_SOFT_SPI, the board configuration
+ must define a list of chip-select function pointers.
+ Currently supported on some MPC8xxx processors. For an
+ example, see include/configs/mpc8349emds.h.
+
- FPGA Support: CONFIG_FPGA
Enables FPGA subsystem.
is useful, if some of the configured banks are only
optionally available.
+- CONFIG_FLASH_SHOW_PROGRESS
+ If defined (must be an integer), print out countdown
+ digits and dots. Recommended value: 45 (9..1) for 80
+ column displays, 15 (3..1) for 40 column displays.
+
- CFG_RX_ETH_BUFFER:
Defines the number of ethernet receive buffers. On some
ethernet controllers it is recommended to set this value
=> setenv ethact SCC ETHERNET
=> ping 10.0.0.1 # traffic sent on SCC ETHERNET
+ ethrotate - When set to "no" U-Boot does not go through all
+ available network interfaces.
+ It just stays at the currently selected interface.
+
netretry - When set to "no" each network operation will
either succeed or fail without retrying.
When set to "once" the network operation will
For PowerPC, the following registers have specific use:
R1: stack pointer
- R2: TOC pointer
+ R2: reserved for system use
R3-R4: parameter passing and return values
R5-R10: parameter passing
R13: small data area pointer
(U-Boot also uses R14 as internal GOT pointer.)
- ==> U-Boot will use R29 to hold a pointer to the global data
+ ==> U-Boot will use R2 to hold a pointer to the global data
Note: on PPC, we could use a static initializer (since the
address of the global data structure is known at compile time),
average for all boards 752 bytes for the whole U-Boot image,
624 text + 127 data).
+On Blackfin, the normal C ABI (except for P5) is followed as documented here:
+ http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface
+
+ ==> U-Boot will use P5 to hold a pointer to the global data
+
On ARM, the following registers are used:
R0: function argument word/integer result