]> git.sur5r.net Git - u-boot/blobdiff - README
PPC: remove dead boards (AMX860, c2mon, ETX094, IAD210, LANTEC, SCM)
[u-boot] / README
diff --git a/README b/README
index 10017c53d5528d6f4aef6d9e0d5e1ba000ce0210..4f16240ebddca9c08284442fa024ef2adea719e8 100644 (file)
--- a/README
+++ b/README
@@ -363,6 +363,12 @@ The following options need to be configured:
                ICache only when Code runs from RAM.
 
 - 85xx CPU Options:
+               CONFIG_SYS_PPC64
+
+               Specifies that the core is a 64-bit PowerPC implementation (implements
+               the "64" category of the Power ISA). This is necessary for ePAPR
+               compliance, among other possible reasons.
+
                CONFIG_SYS_FSL_TBCLK_DIV
 
                Defines the core time base clock divider ratio compared to the
@@ -1084,7 +1090,7 @@ The following options need to be configured:
                CONFIG_CALXEDA_XGMAC
                Support for the Calxeda XGMAC device
 
-               CONFIG_DRIVER_LAN91C96
+               CONFIG_LAN91C96
                Support for SMSC's LAN91C96 chips.
 
                        CONFIG_LAN91C96_BASE
@@ -1094,7 +1100,7 @@ The following options need to be configured:
                        CONFIG_LAN91C96_USE_32_BIT
                        Define this to enable 32 bit addressing
 
-               CONFIG_DRIVER_SMC91111
+               CONFIG_SMC91111
                Support for SMSC's LAN91C111 chip
 
                        CONFIG_SMC91111_BASE
@@ -2176,8 +2182,8 @@ CBFS (Coreboot Filesystem) support
                following board configurations are known to be
                "pRAM-clean":
 
-                       ETX094, IVMS8, IVML24, SPD8xx, TQM8xxL,
-                       HERMES, IP860, RPXlite, LWMON, LANTEC,
+                       IVMS8, IVML24, SPD8xx, TQM8xxL,
+                       HERMES, IP860, RPXlite, LWMON,
                        FLAGADM, TQM8260
 
 - Error Recovery: