exists, unlike the similar options in the Linux kernel. Do not
set these options unless they apply!
+ COUNTER_FREQUENCY
+ Generic timer clock source frequency.
+
+ COUNTER_FREQUENCY_REAL
+ Generic timer clock source frequency if the real clock is
+ different from COUNTER_FREQUENCY, and can only be determined
+ at run time.
+
NOTE: The following can be machine specific errata. These
do have ability to provide rudimentary version and machine
specific checks, but expect no product checks.
boot. See the documentation file README.video for a
description of this variable.
- CONFIG_VIDEO_VGA
-
- Enable the VGA video / BIOS for x86. The alternative if you
- are using coreboot is to use the coreboot frame buffer
- driver.
-
- Keyboard Support:
CONFIG_KEYBOARD
the console jump but can help speed up operation when scrolling
is slow.
+ CONFIG_LCD_ROTATION
+
+ Sometimes, for example if the display is mounted in portrait
+ mode or even if it's mounted landscape but rotated by 180degree,
+ we need to rotate our content of the display relative to the
+ framebuffer, so that user can read the messages which are
+ printed out.
+ Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
+ initialized with a given rotation from "vl_rot" out of
+ "vidinfo_t" which is provided by the board specific code.
+ The value for vl_rot is coded as following (matching to
+ fbcon=rotate:<n> linux-kernel commandline):
+ 0 = no rotation respectively 0 degree
+ 1 = 90 degree rotation
+ 2 = 180 degree rotation
+ 3 = 270 degree rotation
+
+ If CONFIG_LCD_ROTATION is not defined, the console will be
+ initialized with 0degree rotation.
+
CONFIG_LCD_BMP_RLE8
Support drawing of RLE8-compressed bitmaps on the LCD.
Some PHY like Intel LXT971A need extra delay after
command issued before MII status register can be read
-- Ethernet address:
- CONFIG_ETHADDR
- CONFIG_ETH1ADDR
- CONFIG_ETH2ADDR
- CONFIG_ETH3ADDR
- CONFIG_ETH4ADDR
- CONFIG_ETH5ADDR
-
- Define a default value for Ethernet address to use
- for the respective Ethernet interface, in case this
- is not determined automatically.
-
- IP address:
CONFIG_IPADDR
- define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
If those defines are not set, default value is 100000
for speed, and 0 for slave.
+ - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
+ - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
- drivers/i2c/rcar_i2c.c:
- activate this driver with CONFIG_SYS_I2C_RCAR
completely disabled. Anybody can change or delete
these parameters.
- Alternatively, if you #define _both_ CONFIG_ETHADDR
- _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
+ Alternatively, if you define _both_ an ethaddr in the
+ default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
Ethernet address is installed in the environment,
which can be changed exactly ONCE by the user. [The
serial# is unaffected by this, i. e. it remains
memories can be connected with a given cs line.
Currently Xilinx Zynq qspi supports these type of connections.
- CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
- enable the W#/Vpp signal to disable writing to the status
- register on ST MICRON flashes like the N25Q128.
- The status register write enable/disable bit, combined with
- the W#/VPP signal provides hardware data protection for the
- device as follows: When the enable/disable bit is set to 1,
- and the W#/VPP signal is driven LOW, the status register
- nonvolatile bits become read-only and the WRITE STATUS REGISTER
- operation will not execute. The only way to exit this
- hardware-protected mode is to drive W#/VPP HIGH.
-
- SystemACE Support:
CONFIG_SYSTEMACE
- CONFIG_FSL_DDR_SYNC_REFRESH
Enable sync of refresh for multiple controllers.
+- CONFIG_FSL_DDR_BIST
+ Enable built-in memory test for Freescale DDR controllers.
+
- CONFIG_SYS_83XX_DDR_USES_CS0
Only for 83xx systems. If specified, then DDR should
be configured using CS0 and CS1 instead of CS2 and CS3.
flash or offset in NAND flash.
*Note* - these variables don't have to be defined for all boards, some
-boards currenlty use other variables for these purposes, and some
+boards currently use other variables for these purposes, and some
boards use these variables for other purposes.
Image File Name RAM Address Flash Location
warning is printed.
o If neither SROM nor the environment contain a MAC address, an error
- is raised.
+ is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case
+ a random, locally-assigned MAC is used.
If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
will be programmed into hardware as part of the initialization process. This
projects / u-boot / blobdiff