Versioning:
===========
-U-Boot uses a 3 level version number containing a version, a
-sub-version, and a patchlevel: "U-Boot-2.34.5" means version "2",
-sub-version "34", and patchlevel "4".
+Starting with the release in October 2008, the names of the releases
+were changed from numerical release numbers without deeper meaning
+into a time stamp based numbering. Regular releases are identified by
+names consisting of the calendar year and month of the release date.
+Additional fields (if present) indicate release candidates or bug fix
+releases in "stable" maintenance trees.
-The patchlevel is used to indicate certain stages of development
-between released versions, i. e. officially released versions of
-U-Boot will always have a patchlevel of "0".
+Examples:
+ U-Boot v2009.11 - Release November 2009
+ U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
+ U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release
Directory Hierarchy:
====================
-- api Machine/arch independent API for external apps
-- board Board dependent files
-- common Misc architecture independent functions
-- cpu CPU specific files
- - 74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs
- - arm720t Files specific to ARM 720 CPUs
- - arm920t Files specific to ARM 920 CPUs
- - at91rm9200 Files specific to Atmel AT91RM9200 CPU
- - imx Files specific to Freescale MC9328 i.MX CPUs
- - s3c24x0 Files specific to Samsung S3C24X0 CPUs
- - arm925t Files specific to ARM 925 CPUs
- - arm926ejs Files specific to ARM 926 CPUs
- - arm1136 Files specific to ARM 1136 CPUs
- - at32ap Files specific to Atmel AVR32 AP CPUs
- - blackfin Files specific to Analog Devices Blackfin CPUs
- - i386 Files specific to i386 CPUs
- - ixp Files specific to Intel XScale IXP CPUs
- - leon2 Files specific to Gaisler LEON2 SPARC CPU
- - leon3 Files specific to Gaisler LEON3 SPARC CPU
- - mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
- - mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
- - mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
- - mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs
- - mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs
- - mips Files specific to MIPS CPUs
- - mpc5xx Files specific to Freescale MPC5xx CPUs
- - mpc5xxx Files specific to Freescale MPC5xxx CPUs
- - mpc8xx Files specific to Freescale MPC8xx CPUs
- - mpc8220 Files specific to Freescale MPC8220 CPUs
- - mpc824x Files specific to Freescale MPC824x CPUs
- - mpc8260 Files specific to Freescale MPC8260 CPUs
- - mpc85xx Files specific to Freescale MPC85xx CPUs
- - nios Files specific to Altera NIOS CPUs
- - nios2 Files specific to Altera Nios-II CPUs
- - ppc4xx Files specific to AMCC PowerPC 4xx CPUs
- - pxa Files specific to Intel XScale PXA CPUs
- - s3c44b0 Files specific to Samsung S3C44B0 CPUs
- - sa1100 Files specific to Intel StrongARM SA1100 CPUs
-- disk Code for disk drive partition handling
-- doc Documentation (don't expect too much)
-- drivers Commonly used device drivers
-- examples Example code for standalone applications, etc.
-- fs Filesystem code (cramfs, ext2, jffs2, etc.)
-- include Header Files
-- arch/arm/lib Files generic to ARM architecture
-- arch/avr32/lib Files generic to AVR32 architecture
-- arch/blackfin/lib Files generic to Blackfin architecture
-- lib Files generic to all architectures
-- arch/i386/lib Files generic to i386 architecture
-- arch/m68k/lib Files generic to m68k architecture
-- arch/microblaze/lib Files generic to microblaze architecture
-- arch/mips/lib Files generic to MIPS architecture
-- arch/nios/lib Files generic to NIOS architecture
-- arch/nios/lib2 Files generic to NIOS2 architecture
-- arch/ppc/lib Files generic to PowerPC architecture
-- arch/sh/lib Files generic to SH architecture
-- arch/sparc/lib Files generic to SPARC architecture
-- libfdt Library files to support flattened device trees
-- net Networking code
-- post Power On Self Test
-- rtc Real Time Clock drivers
-- tools Tools to build S-Record or U-Boot images, etc.
+/arch Architecture specific files
+ /arm Files generic to ARM architecture
+ /cpu CPU specific files
+ /arm720t Files specific to ARM 720 CPUs
+ /arm920t Files specific to ARM 920 CPUs
+ /at91rm9200 Files specific to Atmel AT91RM9200 CPU
+ /imx Files specific to Freescale MC9328 i.MX CPUs
+ /s3c24x0 Files specific to Samsung S3C24X0 CPUs
+ /arm925t Files specific to ARM 925 CPUs
+ /arm926ejs Files specific to ARM 926 CPUs
+ /arm1136 Files specific to ARM 1136 CPUs
+ /ixp Files specific to Intel XScale IXP CPUs
+ /pxa Files specific to Intel XScale PXA CPUs
+ /s3c44b0 Files specific to Samsung S3C44B0 CPUs
+ /sa1100 Files specific to Intel StrongARM SA1100 CPUs
+ /lib Architecture specific library files
+ /avr32 Files generic to AVR32 architecture
+ /cpu CPU specific files
+ /lib Architecture specific library files
+ /blackfin Files generic to Analog Devices Blackfin architecture
+ /cpu CPU specific files
+ /lib Architecture specific library files
+ /i386 Files generic to i386 architecture
+ /cpu CPU specific files
+ /lib Architecture specific library files
+ /m68k Files generic to m68k architecture
+ /cpu CPU specific files
+ /mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
+ /mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
+ /mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
+ /mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs
+ /mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs
+ /lib Architecture specific library files
+ /microblaze Files generic to microblaze architecture
+ /cpu CPU specific files
+ /lib Architecture specific library files
+ /mips Files generic to MIPS architecture
+ /cpu CPU specific files
+ /lib Architecture specific library files
+ /nios2 Files generic to Altera NIOS2 architecture
+ /cpu CPU specific files
+ /lib Architecture specific library files
+ /powerpc Files generic to PowerPC architecture
+ /cpu CPU specific files
+ /74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs
+ /mpc5xx Files specific to Freescale MPC5xx CPUs
+ /mpc5xxx Files specific to Freescale MPC5xxx CPUs
+ /mpc8xx Files specific to Freescale MPC8xx CPUs
+ /mpc8220 Files specific to Freescale MPC8220 CPUs
+ /mpc824x Files specific to Freescale MPC824x CPUs
+ /mpc8260 Files specific to Freescale MPC8260 CPUs
+ /mpc85xx Files specific to Freescale MPC85xx CPUs
+ /ppc4xx Files specific to AMCC PowerPC 4xx CPUs
+ /lib Architecture specific library files
+ /sh Files generic to SH architecture
+ /cpu CPU specific files
+ /sh2 Files specific to sh2 CPUs
+ /sh3 Files specific to sh3 CPUs
+ /sh4 Files specific to sh4 CPUs
+ /lib Architecture specific library files
+ /sparc Files generic to SPARC architecture
+ /cpu CPU specific files
+ /leon2 Files specific to Gaisler LEON2 SPARC CPU
+ /leon3 Files specific to Gaisler LEON3 SPARC CPU
+ /lib Architecture specific library files
+/api Machine/arch independent API for external apps
+/board Board dependent files
+/common Misc architecture independent functions
+/disk Code for disk drive partition handling
+/doc Documentation (don't expect too much)
+/drivers Commonly used device drivers
+/examples Example code for standalone applications, etc.
+/fs Filesystem code (cramfs, ext2, jffs2, etc.)
+/include Header Files
+/lib Files generic to all architectures
+ /libfdt Library files to support flattened device trees
+ /lzma Library files to support LZMA decompression
+ /lzo Library files to support LZO decompression
+/net Networking code
+/post Power On Self Test
+/rtc Real Time Clock drivers
+/tools Tools to build S-Record or U-Boot images, etc.
Software Configuration:
=======================
must be defined, to setup the maximum idle timeout for
the SMC.
-- Interrupt driven serial port input:
- CONFIG_SERIAL_SOFTWARE_FIFO
-
- PPC405GP only.
- Use an interrupt handler for receiving data on the
- serial port. It also enables using hardware handshake
- (RTS/CTS) and UART's built-in FIFO. Set the number of
- bytes the interrupt driven input buffer should have.
-
- Leave undefined to disable this feature, including
- disable the buffer and hardware handshake.
-
-- Console UART Number:
- CONFIG_UART1_CONSOLE
-
- AMCC PPC4xx only.
- If defined internal UART1 (and not UART0) is used
- as default U-Boot console.
-
- Boot Delay: CONFIG_BOOTDELAY - in seconds
Delay before automatically booting the default image;
set to -1 to disable autoboot.
to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
the CPU's i2c node address).
- Now, the u-boot i2c code for the mpc8xx (cpu/mpc8xx/i2c.c)
- sets the CPU up as a master node and so its address should
- therefore be cleared to 0 (See, eg, MPC823e User's Manual
- p.16-473). So, set CONFIG_SYS_I2C_SLAVE to 0.
+ Now, the u-boot i2c code for the mpc8xx
+ (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
+ and so its address should therefore be cleared to 0 (See,
+ eg, MPC823e User's Manual p.16-473). So, set
+ CONFIG_SYS_I2C_SLAVE to 0.
CONFIG_SYS_I2C_INIT_MPC5XXX
#define I2C_DELAY udelay(2)
+ CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
+
+ If your arch supports the generic GPIO framework (asm/gpio.h),
+ then you may alternatively define the two GPIOs that are to be
+ used as SCL / SDA. Any of the previous I2C_xxx macros will
+ have GPIO-based defaults assigned to them as appropriate.
+
+ You should define these to the GPIO value as given directly to
+ the generic GPIO functions.
+
CONFIG_SYS_I2C_INIT_BOARD
When a board is reset during an i2c bus transfer
custom i2c_init_board() routine in boards/xxx/board.c
is run early in the boot sequence.
+ CONFIG_SYS_I2C_BOARD_LATE_INIT
+
+ An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
+ defined a custom i2c_board_late_init() routine in
+ boards/xxx/board.c is run AFTER the operations in i2c_init()
+ is completed. This callpoint can be used to unreset i2c bus
+ using CPU i2c controller register accesses for CPUs whose i2c
+ controller provide such a method. It is called at the end of
+ i2c_init() to allow i2c_init operations to setup the i2c bus
+ controller on the CPU (e.g. setting bus speed & slave address).
+
CONFIG_I2CFAST (PPC405GP|PPC405EP only)
This option enables configuration of bi_iic_fast[] flags
ETX094, IVMS8, IVML24, SPD8xx, TQM8xxL,
HERMES, IP860, RPXlite, LWMON, LANTEC,
- PCU_E, FLAGADM, TQM8260
+ FLAGADM, TQM8260
- Error Recovery:
CONFIG_PANIC_HANG
15 arch/<arch>/lib/bootm.c All preparation done, transferring control to OS
- -30 arch/ppc/lib/board.c Fatal error, hang the system
+ -30 arch/powerpc/lib/board.c Fatal error, hang the system
-31 post/post.c POST test failed, detected by post_output_backlog()
-32 post/post.c POST test failed, detected by post_run_single()
- CONFIG_SYS_MONITOR_BASE:
Physical start address of boot monitor code (set by
make config files to be same as the text base address
- (TEXT_BASE) used when linking) - same as
+ (CONFIG_SYS_TEXT_BASE) used when linking) - same as
CONFIG_SYS_FLASH_BASE when booting from flash.
- CONFIG_SYS_MONITOR_LEN:
all data for the Linux kernel must be between "bootm_low"
and "bootm_low" + CONFIG_SYS_BOOTMAPSZ.
+- CONFIG_SYS_BOOT_RAMDISK_HIGH:
+ Enable initrd_high functionality. If defined then the
+ initrd_high feature is enabled and the bootm ramdisk subcommand
+ is enabled.
+
+- CONFIG_SYS_BOOT_GET_CMDLINE:
+ Enables allocating and saving kernel cmdline in space between
+ "bootm_low" and "bootm_low" + BOOTMAPSZ.
+
+- CONFIG_SYS_BOOT_GET_KBD:
+ Enables allocating and saving a kernel copy of the bd_info in
+ space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
+
- CONFIG_SYS_MAX_FLASH_BANKS:
Max number of Flash memory banks
on high Ethernet traffic.
Defaults to 4 if not defined.
+- CONFIG_ENV_MAX_ENTRIES
+
+ Maximum number of entries in the hash table that is used
+ internally to store the environment settings. The default
+ setting is supposed to be generous and should work in most
+ cases. This setting can be used to tune behaviour; see
+ lib/hashtable.c for details.
+
The following definitions that deal with the placement and management
of environment data (variable area); in general, we support the
following configurations:
I2C muxes, you can define here, how to reach this
EEPROM. For example:
- #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
+ #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
EEPROM which holds the environment, is reached over
a pca9547 i2c mux with address 0x70, channel 3.
- CONFIG_ENV_SIZE:
These two #defines specify the offset and size of the environment
- area within the first NAND device.
+ area within the first NAND device. CONFIG_ENV_OFFSET must be
+ aligned to an erase block boundary.
- - CONFIG_ENV_OFFSET_REDUND
+ - CONFIG_ENV_OFFSET_REDUND (optional):
This setting describes a second storage area of CONFIG_ENV_SIZE
- size used to hold a redundant copy of the environment data,
- so that there is a valid backup copy in case there is a
- power failure during a "saveenv" operation.
+ size used to hold a redundant copy of the environment data, so
+ that there is a valid backup copy in case there is a power failure
+ during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be
+ aligned to an erase block boundary.
+
+ - CONFIG_ENV_RANGE (optional):
- Note: CONFIG_ENV_OFFSET and CONFIG_ENV_OFFSET_REDUND must be aligned
- to a block boundary, and CONFIG_ENV_SIZE must be a multiple of
- the NAND devices block size.
+ Specifies the length of the region in which the environment
+ can be written. This should be a multiple of the NAND device's
+ block size. Specifying a range with more erase blocks than
+ are needed to hold CONFIG_ENV_SIZE allows bad blocks within
+ the range to be avoided.
+
+ - CONFIG_ENV_OFFSET_OOB (optional):
+
+ Enables support for dynamically retrieving the offset of the
+ environment from block zero's out-of-band data. The
+ "nand env.oob" command can be used to record this offset.
+ Currently, CONFIG_ENV_OFFSET_REDUND is not supported when
+ using CONFIG_ENV_OFFSET_OOB.
- CONFIG_NAND_ENV_DST
Please note that the environment is read-only until the monitor
has been relocated to RAM and a RAM copy of the environment has been
-created; also, when using EEPROM you will have to use getenv_r()
+created; also, when using EEPROM you will have to use getenv_f()
until then to read environment variables.
The environment is protected by a CRC32 checksum. Before the monitor
CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL,
CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE,
CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only)
- Overrides the default PCI memory map in cpu/mpc8260/pci.c if set.
+ Overrides the default PCI memory map in arch/powerpc/cpu/mpc8260/pci.c if set.
- CONFIG_PCI_DISABLE_PCIE:
Disable PCI-Express on systems where it is supported but not
interface is currently active. For example you
can do the following
- => setenv ethact FEC ETHERNET
- => ping 192.168.0.1 # traffic sent on FEC ETHERNET
- => setenv ethact SCC ETHERNET
- => ping 10.0.0.1 # traffic sent on SCC ETHERNET
+ => setenv ethact FEC
+ => ping 192.168.0.1 # traffic sent on FEC
+ => setenv ethact SCC
+ => ping 10.0.0.1 # traffic sent on SCC
ethrotate - When set to "no" U-Boot does not go through all
available network interfaces.
o If neither SROM nor the environment contain a MAC address, an error
is raised.
+If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
+will be programmed into hardware as part of the initialization process. This
+may be skipped by setting the appropriate 'ethmacskip' environment variable.
+The naming convention is as follows:
+"ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc.
Image Formats:
==============
Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS,
INTEGRITY).
* Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86,
- IA64, MIPS, NIOS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
- Currently supported: ARM, AVR32, Intel x86, MIPS, NIOS, PowerPC).
+ IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
+ Currently supported: ARM, AVR32, Intel x86, MIPS, Nios II, PowerPC).
* Compression Type (uncompressed, gzip, bzip2)
* Load Address
* Entry Point
(no, we don't intend to provide a full virtual machine interface to
Linux :-).
-But now you can ignore ALL boot loader code (in arch/ppc/mbxboot).
+But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).
Just make sure your machine specific header file (for instance
include/asm-ppc/tqm8xx.h) includes the same definition of the Board
-> tools/mkimage -n '2.4.4 kernel for TQM850L' \
> -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
- > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux.gz \
+ > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
> examples/uImage.TQM850L
Image Name: 2.4.4 kernel for TQM850L
Created: Wed Jul 19 02:34:59 2000
needs more space in Flash, but boots much faster since it does not
need to be uncompressed:
- -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux.gz
+ -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
-> tools/mkimage -n '2.4.4 kernel for TQM850L' \
> -A ppc -O linux -T kernel -C none -a 0 -e 0 \
- > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux \
+ > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
> examples/uImage.TQM850L-uncompressed
Image Name: 2.4.4 kernel for TQM850L
Created: Wed Jul 19 02:34:59 2000
==> U-Boot will use R8 to hold a pointer to the global data
+On Nios II, the ABI is documented here:
+ http://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
+
+ ==> U-Boot will use gp to hold a pointer to the global data
+
+ Note: on Nios II, we give "-G0" option to gcc and don't use gp
+ to access small data sections, so gp is free.
+
NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
or current versions of GCC may "optimize" the code too much.