directory according to the instructions in cogent/README.
+Sandbox Environment:
+--------------------
+
+U-Boot can be built natively to run on a Linux host using the 'sandbox'
+board. This allows feature development which is not board- or architecture-
+specific to be undertaken on a native platform. The sandbox is also used to
+run some of U-Boot's tests.
+
+See board/sandbox/sandbox/README.sandbox for more details.
+
+
Configuration Options:
----------------------
the LCD display every second with
a "rotator" |\-/|\-/
-- Board flavour: (if CONFIG_MPC8260ADS is defined)
- CONFIG_ADSTYPE
- Possible values are:
- CONFIG_SYS_8260ADS - original MPC8260ADS
- CONFIG_SYS_8266ADS - MPC8266ADS
- CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR
- CONFIG_SYS_8272ADS - MPC8272ADS
-
- Marvell Family Member
CONFIG_SYS_MVFS - define it if you want to enable
multiple fs option at one time
In this mode, a single differential clock is used to supply
clocks to the sysclock, ddrclock and usbclock.
+ CONFIG_SYS_CPC_REINIT_F
+ This CONFIG is defined when the CPC is configured as SRAM at the
+ time of U-boot entry and is required to be re-initialized.
+
+ CONFIG_DEEP_SLEEP
+ Inidcates this SoC supports deep sleep feature. If deep sleep is
+ supported, core will start to execute uboot when wakes up.
+
- Generic CPU options:
+ CONFIG_SYS_GENERIC_GLOBAL_DATA
+ Defines global data is initialized in generic board board_init_f().
+ If this macro is defined, global data is created and cleared in
+ generic board board_init_f(). Without this macro, architecture/board
+ should initialize global data before calling board_init_f().
+
CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
Defines the endianess of the CPU. Implementation of those
CONFIG_SYS_FSL_DDRC_GEN3
Freescale DDR3 controller.
+ CONFIG_SYS_FSL_DDRC_GEN4
+ Freescale DDR4 controller.
+
CONFIG_SYS_FSL_DDRC_ARM_GEN3
Freescale DDR3 controller for ARM-based SoCs.
CONFIG_SYS_FSL_DDR3
Board config to use DDR3. It can be enabled for SoCs with
- Freescale DDR3 controllers.
+ Freescale DDR3 or DDR3L controllers.
+
+ CONFIG_SYS_FSL_DDR3L
+ Board config to use DDR3L. It can be enabled for SoCs with
+ DDR3L controllers.
+
+ CONFIG_SYS_FSL_DDR4
+ Board config to use DDR4. It can be enabled for SoCs with
+ DDR4 controllers.
CONFIG_SYS_FSL_IFC_BE
Defines the IFC controller register space as Big Endian
PBI commands can be used to configure SoC before it starts the execution.
Please refer doc/README.pblimage for more details
+ CONFIG_SPL_FSL_PBL
+ It adds a target to create boot binary having SPL binary in PBI format
+ concatenated with u-boot binary.
+
CONFIG_SYS_FSL_DDR_BE
Defines the DDR controller register space as Big Endian
boot loader that has already initialized the UART. Define this
variable to flush the UART at init time.
+ CONFIG_SERIAL_HW_FLOW_CONTROL
+
+ Define this variable to enable hw flow control in serial driver.
+ Current user of this option is drivers/serial/nsl16550.c driver
- Console Interface:
Depending on board, define exactly one serial port
CONFIG_CMD_IMLS List all images found in NOR flash
CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
CONFIG_CMD_IMMAP * IMMR dump support
+ CONFIG_CMD_IOTRACE * I/O tracing for debugging
CONFIG_CMD_IMPORTENV * import an environment
CONFIG_CMD_INI * import data from an ini file into the env
CONFIG_CMD_IRQ * irqinfo
Note that if the GPIO device uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
+- I/O tracing:
+ When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
+ accesses and can checksum them or write a list of them out
+ to memory. See the 'iotrace' command for details. This is
+ useful for testing device drivers since it can confirm that
+ the driver behaves the same way before and after a code
+ change. Currently this is supported on sandbox and arm. To
+ add support for your architecture, add '#include <iotrace.h>'
+ to the bottom of arch/<arch>/include/asm/io.h and test.
+
+ Example output from the 'iotrace stats' command is below.
+ Note that if the trace buffer is exhausted, the checksum will
+ still continue to operate.
+
+ iotrace is enabled
+ Start: 10000000 (buffer start address)
+ Size: 00010000 (buffer size)
+ Offset: 00000120 (current buffer offset)
+ Output: 10000120 (start + offset)
+ Count: 00000018 (number of trace records)
+ CRC32: 9526fb66 (CRC32 of all trace records)
+
- Timestamp Support:
When CONFIG_TIMESTAMP is selected, the timestamp
CONFIG_SH_ETHER_CACHE_WRITEBACK
If this option is set, the driver enables cache flush.
+- PWM Support:
+ CONFIG_PWM_IMX
+ Support for PWM modul on the imx6.
+
- TPM Support:
CONFIG_TPM
Support TPM devices.
CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
txfilltuning field in the EHCI controller on reset.
- CONFIG_USB_HUB_MIN_POWER_ON_DELAY defines the minimum
- interval for usb hub power-on delay.(minimum 100msec)
-
- USB Device:
Define the below if you wish to use the USB console.
Once firmware is rebuilt from a serial console issue the
for your device
- CONFIG_USBD_PRODUCTID 0xFFFF
- Some USB device drivers may need to check USB cable attachment.
- In this case you can enable following config in BoardName.h:
- CONFIG_USB_CABLE_CHECK
- This enables function definition:
- - usb_cable_connected() in include/usb.h
- Implementation of this function is board-specific.
-
- ULPI Layer Support:
The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
the generic ULPI layer. The generic layer accesses the ULPI PHY
CONFIG_SH_MMCIF_CLK
Define the clock frequency for MMCIF
+ CONFIG_GENERIC_MMC
+ Enable the generic MMC driver
+
+ CONFIG_SUPPORT_EMMC_BOOT
+ Enable some additional features of the eMMC boot partitions.
+
+ CONFIG_SUPPORT_EMMC_RPMB
+ Enable the commands for reading, writing and programming the
+ key for the Replay Protection Memory Block partition in eMMC.
+
- USB Device Firmware Update (DFU) class support:
CONFIG_DFU_FUNCTION
This enables the USB portion of the DFU USB class
entering dfuMANIFEST state. Host waits this timeout, before
sending again an USB request to the device.
+- USB Device Android Fastboot support:
+ CONFIG_CMD_FASTBOOT
+ This enables the command "fastboot" which enables the Android
+ fastboot mode for the platform's USB device. Fastboot is a USB
+ protocol for downloading images, flashing and device control
+ used on Android devices.
+ See doc/README.android-fastboot for more information.
+
+ CONFIG_ANDROID_BOOT_IMAGE
+ This enables support for booting images which use the Android
+ image format header.
+
+ CONFIG_USB_FASTBOOT_BUF_ADDR
+ The fastboot protocol requires a large memory buffer for
+ downloads. Define this to the starting RAM address to use for
+ downloaded images.
+
+ CONFIG_USB_FASTBOOT_BUF_SIZE
+ The fastboot protocol requires a large memory buffer for
+ downloads. This buffer should be as large as possible for a
+ platform. Define this to the size available RAM for fastboot.
+
- Journaling Flash filesystem support:
CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
CONFIG_JFFS2_NAND_DEV
filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
and cbfsload.
+- FAT(File Allocation Table) filesystem cluster size:
+ CONFIG_FS_FAT_MAX_CLUSTSIZE
+
+ Define the max cluster size for fat operations else
+ a default value of 65536 will be defined.
+
- Keyboard Support:
CONFIG_ISA_KEYBOARD
9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
with a fix speed from 100000 and the slave addr 0!
+ - drivers/i2c/ihs_i2c.c
+ - activate this driver with CONFIG_SYS_I2C_IHS
+ - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
+ - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
+ - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
+ - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
+ - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
+ - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
+ - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
+ - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
+ - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
+ - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
+ - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
+ - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
+
additional defines:
CONFIG_SYS_NUM_I2C_BUSES
Specify the number of FPGA devices to support.
+ CONFIG_CMD_FPGA_LOADMK
+
+ Enable support for fpga loadmk command
+
+ CONFIG_CMD_FPGA_LOADP
+
+ Enable support for fpga loadp command - load partial bitstream
+
+ CONFIG_CMD_FPGA_LOADBP
+
+ Enable support for fpga loadbp command - load partial bitstream
+ (Xilinx only)
+
CONFIG_SYS_FPGA_PROG_FEEDBACK
Enable printing of hash marks during FPGA configuration.
memories can be connected with a given cs line.
currently Xilinx Zynq qspi support these type of connections.
+ CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
+ enable the W#/Vpp signal to disable writing to the status
+ register on ST MICRON flashes like the N25Q128.
+ The status register write enable/disable bit, combined with
+ the W#/VPP signal provides hardware data protection for the
+ device as follows: When the enable/disable bit is set to 1,
+ and the W#/VPP signal is driven LOW, the status register
+ nonvolatile bits become read-only and the WRITE STATUS REGISTER
+ operation will not execute. The only way to exit this
+ hardware-protected mode is to drive W#/VPP HIGH.
+
- SystemACE Support:
CONFIG_SYSTEMACE
-150 common/cmd_nand.c Incorrect FIT image format
151 common/cmd_nand.c FIT image format OK
+- legacy image format:
+ CONFIG_IMAGE_FORMAT_LEGACY
+ enables the legacy image format support in U-Boot.
+
+ Default:
+ enabled if CONFIG_FIT_SIGNATURE is not defined.
+
+ CONFIG_DISABLE_IMAGE_LEGACY
+ disable the legacy image format
+
+ This define is introduced, as the legacy image format is
+ enabled per default for backward compatibility.
+
- FIT image support:
CONFIG_FIT
Enable support for the FIT uImage format.
using a hash signed and verified using RSA. See
doc/uImage.FIT/signature.txt for more details.
+ WARNING: When relying on signed FIT images with required
+ signature check the legacy image format is default
+ disabled. If a board need legacy image format support
+ enable this through CONFIG_IMAGE_FORMAT_LEGACY
+
+ CONFIG_FIT_DISABLE_SHA256
+ Supporting SHA256 hashes has quite an impact on binary size.
+ For constrained systems sha256 hash support can be disabled
+ with this option.
+
- Standalone program support:
CONFIG_STANDALONE_LOAD_ADDR
supports MMC, NAND and YMODEM loading of U-Boot and NAND
NAND loading of the Linux Kernel.
+ CONFIG_SPL_OS_BOOT
+ Enable booting directly to an OS from SPL.
+ See also: doc/README.falcon
+
CONFIG_SPL_DISPLAY_PRINT
For ARM, enable an optional function to print more information
about the running system.
continuing (the hardware starts execution after just
loading the first page rather than the full 4K).
+ CONFIG_SPL_SKIP_RELOCATE
+ Avoid SPL relocation
+
CONFIG_SPL_NAND_BASE
Include nand_base.c in the SPL. Requires
CONFIG_SPL_NAND_DRIVERS.
Support for NAND boot using simple NAND drivers that
expose the cmd_ctrl() interface.
+ CONFIG_SPL_MTD_SUPPORT
+ Support for the MTD subsystem within SPL. Useful for
+ environment on NAND support within SPL.
+
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
Set for the SPL on PPC mpc8xxx targets, support for
drivers/ddr/fsl/libddr.o in SPL binary.
- CONFIG_SYS_MALLOC_LEN:
Size of DRAM reserved for malloc() use.
+- CONFIG_SYS_MALLOC_F_LEN
+ Size of the malloc() pool for use before relocation. If
+ this is defined, then a very simple malloc() implementation
+ will become available before relocation. The address is just
+ below the global data, and the stack is moved down to make
+ space.
+
+ This feature allocates regions with increasing addresses
+ within the region. calloc() is supported, but realloc()
+ is not available. free() is supported but does nothing.
+ The memory will be freed (or in fact just forgotton) when
+ U-Boot relocates itself.
+
+ Pre-relocation malloc() is only supported on sandbox
+ at present but is fairly easy to enable for other archs.
+
- CONFIG_SYS_BOOTM_LEN:
Normally compressed uImages are limited to an
uncompressed size of 8 MBytes. If this is not enough,
environment area within the total memory of your DataFlash placed
at the specified address.
+- CONFIG_ENV_IS_IN_SPI_FLASH:
+
+ Define this if you have a SPI Flash memory device which you
+ want to use for the environment.
+
+ - CONFIG_ENV_OFFSET:
+ - CONFIG_ENV_SIZE:
+
+ These two #defines specify the offset and size of the
+ environment area within the SPI Flash. CONFIG_ENV_OFFSET must be
+ aligned to an erase sector boundary.
+
+ - CONFIG_ENV_SECT_SIZE:
+
+ Define the SPI flash's sector size.
+
+ - CONFIG_ENV_OFFSET_REDUND (optional):
+
+ This setting describes a second storage area of CONFIG_ENV_SIZE
+ size used to hold a redundant copy of the environment data, so
+ that there is a valid backup copy in case there is a power failure
+ during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be
+ aligned to an erase sector boundary.
+
+ - CONFIG_ENV_SPI_BUS (optional):
+ - CONFIG_ENV_SPI_CS (optional):
+
+ Define the SPI bus and chip select. If not defined they will be 0.
+
+ - CONFIG_ENV_SPI_MAX_HZ (optional):
+
+ Define the SPI max work clock. If not defined then use 1MHz.
+
+ - CONFIG_ENV_SPI_MODE (optional):
+
+ Define the SPI work mode. If not defined then use SPI_MODE_3.
+
- CONFIG_ENV_IS_IN_REMOTE:
Define this if you have a remote memory space which you
You will probably want to define these to avoid a really noisy system
when storing the env in UBI.
+- CONFIG_ENV_IS_IN_FAT:
+ Define this if you want to use the FAT file system for the environment.
+
+ - FAT_ENV_INTERFACE:
+
+ Define this to a string that is the name of the block device.
+
+ - FAT_ENV_DEV_AND_PART:
+
+ Define this to a string to specify the partition of the device. It can
+ be as following:
+
+ "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
+ - "D:P": device D partition P. Error occurs if device D has no
+ partition table.
+ - "D:0": device D.
+ - "D" or "D:": device D partition 1 if device D has partition
+ table, or the whole device D if has no partition
+ table.
+ - "D:auto": first partition in device D with bootable flag set.
+ If none, first valid paratition in device D. If no
+ partition table then means device D.
+
+ - FAT_ENV_FILE:
+
+ It's a string of the FAT file name. This file use to store the
+ envrionment.
+
+ - CONFIG_FAT_WRITE:
+ This should be defined. Otherwise it cannot save the envrionment file.
+
- CONFIG_ENV_IS_IN_MMC:
Define this if you have an MMC device which you want to use for the
- CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC:
Enables the RTC32K OSC on AM33xx based plattforms
+- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
+ Option to disable subpage write in NAND driver
+ driver that uses this:
+ drivers/mtd/nand/davinci_nand.c
+
Freescale QE/FMAN Firmware Support:
-----------------------------------
are used to identify the storage device (NOR flash, SPI, etc) and the address
within that device.
-- CONFIG_SYS_QE_FMAN_FW_ADDR
- The address in the storage device where the firmware is located. The
+- CONFIG_SYS_FMAN_FW_ADDR
+ The address in the storage device where the FMAN microcode is located. The
+ meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
+ is also specified.
+
+- CONFIG_SYS_QE_FW_ADDR
+ The address in the storage device where the QE microcode is located. The
meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
is also specified.
window->master inbound window->master LAW->the ucode address in
master's memory space.
+Freescale Layerscape Management Complex Firmware Support:
+---------------------------------------------------------
+The Freescale Layerscape Management Complex (MC) supports the loading of
+"firmware".
+This firmware often needs to be loaded during U-Boot booting, so macros
+are used to identify the storage device (NOR flash, SPI, etc) and the address
+within that device.
+
+- CONFIG_FSL_MC_ENET
+ Enable the MC driver for Layerscape SoCs.
+
+- CONFIG_SYS_LS_MC_FW_ADDR
+ The address in the storage device where the firmware is located. The
+ meaning of this address depends on which CONFIG_SYS_LS_MC_FW_IN_xxx macro
+ is also specified.
+
+- CONFIG_SYS_LS_MC_FW_LENGTH
+ The maximum possible size of the firmware. The firmware binary format
+ has a field that specifies the actual size of the firmware, but it
+ might not be possible to read any part of the firmware unless some
+ local storage is allocated to hold the entire firmware first.
+
+- CONFIG_SYS_LS_MC_FW_IN_NOR
+ Specifies that MC firmware is located in NOR flash, mapped as
+ normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the
+ virtual address in NOR flash.
+
Building the Software:
======================
and make sure that your definition of IMAP_ADDR uses the same value
as your U-Boot configuration in CONFIG_SYS_IMMR.
+Note that U-Boot now has a driver model, a unified model for drivers.
+If you are adding a new driver, plumb it into driver model. If there
+is no uclass available, you are encouraged to create one. See
+doc/driver-model.
+
Configuring the Linux kernel:
-----------------------------