x86: ivybridge: Enable the MRC cache

[u-boot] / README

diff --git a/README b/README
index a13705ae7a846bc5d7f51a21e21f81c4fc87810e..d18df54ec9a14d662f4a6495b45aa92c61aa9962 100644 (file)
--- a/README
+++ b/README
@@ -681,8 +681,10 @@ The following options need to be configured:
                CONFIG_ARM_ERRATA_742230
                CONFIG_ARM_ERRATA_743622
                CONFIG_ARM_ERRATA_751472
-               CONFIG_ARM_ERRATA_794072
                CONFIG_ARM_ERRATA_761320
+               CONFIG_ARM_ERRATA_773022
+               CONFIG_ARM_ERRATA_774769
+               CONFIG_ARM_ERRATA_794072
 
                If set, the workarounds for these ARM errata are applied early
                during U-Boot startup. Note that these options force the
@@ -794,18 +796,10 @@ The following options need to be configured:
 - vxWorks boot parameters:
 
                bootvx constructs a valid bootline using the following
-               environments variables: bootfile, ipaddr, serverip, hostname.
+               environments variables: bootdev, bootfile, ipaddr, netmask,
+               serverip, gatewayip, hostname, othbootargs.
                It loads the vxWorks image pointed bootfile.
 
-               CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
-               CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
-               CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
-               CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
-
-               CONFIG_SYS_VXWORKS_ADD_PARAMS
-
-               Add it at the end of the bootline. E.g "u=username pw=secret"
-
                Note: If a "bootargs" environment is defined, it will overwride
                the defaults discussed just above.
 
@@ -2359,16 +2353,20 @@ CBFS (Coreboot Filesystem) support
 
                - drivers/i2c/i2c_mxc.c
                  - activate this driver with CONFIG_SYS_I2C_MXC
+                 - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
+                 - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
+                 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
+                 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
                  - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
                  - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
                  - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
                  - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
                  - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
                  - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
+                 - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
+                 - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
                If those defines are not set, default value is 100000
                for speed, and 0 for slave.
-                 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
-                 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
 
                - drivers/i2c/rcar_i2c.c:
                  - activate this driver with CONFIG_SYS_I2C_RCAR