ARM: rename "arm9tdmi vector_catch" to "arm9 ..."

[openocd] / TODO

diff --git a/TODO b/TODO
index 0d888129f302188246783fbb9ecba4fa4f9c2672..611bdd3cd37730d54b4233dd31f1d136776937b0 100644 (file)
--- a/TODO
+++ b/TODO
@@ -46,7 +46,6 @@ This section list issues that need to be resolved in the JTAG layer.
 The following tasks have been suggested for cleaning up the JTAG layer:
 
 - use tap_set_state everywhere to allow logging TAP state transitions
-- rename other tap_states to use standard JTAG names (suggested by ML)
 - Encapsulate cmd_queue_cur_state and related varaible handling.
 - add slick 32 bit versions of jtag_add_xxx_scan() that avoids
 buf_set_u32() calls and other evidence of poor impedance match between
@@ -139,6 +138,9 @@ Once the above are completed:
 - regression: "reset halt" between 729(works) and 788(fails): @par
 https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
 - ARM7/9:
+  - clean up "arm9tdmi vector_catch". Available for some arm7 cores? @par
+https://lists.berlios.de/pipermail/openocd-development/2009-October/011488.html
+https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
   - add reset option to allow programming embedded ice while srst is asserted.
   Some CPUs will gate the JTAG clock when srst is asserted and in this case,
   it is necessary to program embedded ice and then assert srst afterwards.
@@ -206,6 +208,8 @@ https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
 
 @section thelistdebug Debugger Support
 
+- add support for masks in watchpoints? @par
+  https://lists.berlios.de/pipermail/openocd-development/2009-October/011507.html
 - breakpoints can get lost in some circumstances: @par
   https://lists.berlios.de/pipermail/openocd-development/2009-June/008853.html
 - integrate Keil AGDI interface to OpenOCD? (submitted by Dario Vecchio)