Add GPL-2.0+ SPDX-License-Identifier to source files

[u-boot] / arch / arm / cpu / arm1136 / mx31 / timer.c

diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c
index b8848c48b477cc2e2ba07f427bb74fe2e75c9788..f111242e5314a377fb252998e994acf9fd047626 100644 (file)
--- a/arch/arm/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
@@ -2,28 +2,15 @@
  * (C) Copyright 2007
  * Sascha Hauer, Pengutronix
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
-#include <asm/arch/mx31-regs.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
 #include <div64.h>
+#include <watchdog.h>
+#include <asm/io.h>
 
 #define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
 
@@ -39,36 +26,39 @@
 #define GPTCR_CLKSOURCE_32     (4 << 6)        /* Clock source         */
 #define GPTCR_TEN              1               /* Timer enable         */
 
-static ulong timestamp;
-static ulong lastinc;
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
+ * "tick" is internal timer period
+ */
 
-/* "time" is measured in 1 / CONFIG_SYS_HZ seconds, "tick" is internal timer period */
 #ifdef CONFIG_MX31_TIMER_HIGH_PRECISION
 /* ~0.4% error - measured with stop-watch on 100s boot-delay */
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {
        tick *= CONFIG_SYS_HZ;
-       do_div(tick, CONFIG_MX31_CLK32);
+       do_div(tick, MXC_CLK32);
        return tick;
 }
 
 static inline unsigned long long time_to_tick(unsigned long long time)
 {
-       time *= CONFIG_MX31_CLK32;
+       time *= MXC_CLK32;
        do_div(time, CONFIG_SYS_HZ);
        return time;
 }
 
 static inline unsigned long long us_to_tick(unsigned long long us)
 {
-       us = us * CONFIG_MX31_CLK32 + 999999;
+       us = us * MXC_CLK32 + 999999;
        do_div(us, 1000000);
        return us;
 }
 #else
 /* ~2% error */
-#define TICK_PER_TIME  ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
-#define US_PER_TICK    (1000000 / CONFIG_MX31_CLK32)
+#define TICK_PER_TIME  ((MXC_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
+#define US_PER_TICK    (1000000 / MXC_CLK32)
 
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {
@@ -90,7 +80,7 @@ static inline unsigned long long us_to_tick(unsigned long long us)
 #endif
 
 /* The 32768Hz 32-bit timer overruns in 131072 seconds */
-int timer_init (void)
+int timer_init(void)
 {
        int i;
 
@@ -105,54 +95,37 @@ int timer_init (void)
        return 0;
 }
 
-void reset_timer_masked (void)
-{
-       /* reset time */
-       lastinc = GPTCNT; /* capture current incrementer value time */
-       timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
-void reset_timer(void)
-{
-       reset_timer_masked();
-}
-
-unsigned long long get_ticks (void)
+unsigned long long get_ticks(void)
 {
        ulong now = GPTCNT; /* current tick value */
 
-       if (now >= lastinc)     /* normal mode (non roll) */
+       if (now >= gd->arch.lastinc)    /* normal mode (non roll) */
                /* move stamp forward with absolut diff ticks */
-               timestamp += (now - lastinc);
+               gd->arch.tbl += (now - gd->arch.lastinc);
        else                    /* we have rollover of incrementer */
-               timestamp += (0xFFFFFFFF - lastinc) + now;
-       lastinc = now;
-       return timestamp;
+               gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
+       gd->arch.lastinc = now;
+       return gd->arch.tbl;
 }
 
-ulong get_timer_masked (void)
+ulong get_timer_masked(void)
 {
        /*
         * get_ticks() returns a long long (64 bit), it wraps in
-        * 2^64 / CONFIG_MX31_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
+        * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
         * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
         * 5 * 10^6 days - long enough.
         */
        return tick_to_time(get_ticks());
 }
 
-ulong get_timer (ulong base)
-{
-       return get_timer_masked () - base;
-}
-
-void set_timer (ulong t)
+ulong get_timer(ulong base)
 {
-       timestamp = time_to_tick(t);
+       return get_timer_masked() - base;
 }
 
 /* delay x useconds AND preserve advance timestamp value */
-void __udelay (unsigned long usec)
+void __udelay(unsigned long usec)
 {
        unsigned long long tmp;
        ulong tmo;
@@ -164,7 +137,11 @@ void __udelay (unsigned long usec)
                 /*NOP*/;
 }
 
-void reset_cpu (ulong addr)
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
 {
-       __REG16(WDOG_BASE) = 4;
+       return MXC_CLK32;
 }