Merge 'u-boot-atmel/master' into 'u-boot-arm/master'

[u-boot] / arch / arm / cpu / arm1136 / mx35 / asm-offsets.c

diff --git a/arch/arm/cpu/arm1136/mx35/asm-offsets.c b/arch/arm/cpu/arm1136/mx35/asm-offsets.c
index d2678e29a7e5814e1b670fec063b3c06831e8570..26e14da192dddb13bc7fc9262b7ca74bcf2decbc 100644 (file)
--- a/arch/arm/cpu/arm1136/mx35/asm-offsets.c
+++ b/arch/arm/cpu/arm1136/mx35/asm-offsets.c
@@ -22,7 +22,6 @@
 
 int main(void)
 {
-
        /* Round up to make sure size gives nice stack alignment */
        DEFINE(CLKCTL_CCMR, offsetof(struct ccm_regs, ccmr));
        DEFINE(CLKCTL_PDR0, offsetof(struct ccm_regs, pdr0));
@@ -38,6 +37,38 @@ int main(void)
        DEFINE(CLKCTL_CGR0, offsetof(struct ccm_regs, cgr0));
        DEFINE(CLKCTL_CGR1, offsetof(struct ccm_regs, cgr1));
        DEFINE(CLKCTL_CGR2, offsetof(struct ccm_regs, cgr2));
+       DEFINE(CLKCTL_CGR3, offsetof(struct ccm_regs, cgr3));
+
+       /* Multi-Layer AHB Crossbar Switch */
+       DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
+       DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
+       DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
+       DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
+       DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
+       DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
+       DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
+       DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
+       DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
+       DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
+       DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
+       DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
+       DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
+       DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
+       DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
+       DEFINE(MAX_MGPCR5, offsetof(struct max_regs, mgpcr5));
+
+       /* AHB <-> IP-Bus Interface */
+       DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
+       DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
+       DEFINE(AIPS_PACR_0_7, offsetof(struct aips_regs, pacr_0_7));
+       DEFINE(AIPS_PACR_8_15, offsetof(struct aips_regs, pacr_8_15));
+       DEFINE(AIPS_PACR_16_23, offsetof(struct aips_regs, pacr_16_23));
+       DEFINE(AIPS_PACR_24_31, offsetof(struct aips_regs, pacr_24_31));
+       DEFINE(AIPS_OPACR_0_7, offsetof(struct aips_regs, opacr_0_7));
+       DEFINE(AIPS_OPACR_8_15, offsetof(struct aips_regs, opacr_8_15));
+       DEFINE(AIPS_OPACR_16_23, offsetof(struct aips_regs, opacr_16_23));
+       DEFINE(AIPS_OPACR_24_31, offsetof(struct aips_regs, opacr_24_31));
+       DEFINE(AIPS_OPACR_32_39, offsetof(struct aips_regs, opacr_32_39));
 
        return 0;
 }