Merge branch 'next' of git://git.denx.de/u-boot-mpc83xx

[u-boot] / arch / arm / cpu / arm1136 / mx35 / timer.c

diff --git a/arch/arm/cpu/arm1136/mx35/timer.c b/arch/arm/cpu/arm1136/mx35/timer.c
index 04937a1dfeb733ad342b0a1c9821dabf822e7207..cc6166f938b4e04adb01a587c36bafc49bf73f7a 100644 (file)
--- a/arch/arm/cpu/arm1136/mx35/timer.c
+++ b/arch/arm/cpu/arm1136/mx35/timer.c
@@ -4,76 +4,70 @@
  *
  * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <asm/io.h>
 #include <div64.h>
 #include <asm/arch/imx-regs.h>
+#include <asm/arch/crm_regs.h>
 #include <asm/arch/clock.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define timestamp      (gd->tbl)
-#define lastinc                (gd->lastinc)
+#define timestamp      (gd->arch.tbl)
+#define lastinc                (gd->arch.lastinc)
 
 /* General purpose timers bitfields */
 #define GPTCR_SWR       (1<<15)        /* Software reset */
 #define GPTCR_FRR       (1<<9) /* Freerun / restart */
-#define GPTCR_CLKSOURCE_32   (0x100<<6)        /* Clock source */
-#define GPTCR_CLKSOURCE_IPG (0x001<<6) /* Clock source */
+#define GPTCR_CLKSOURCE_32   (4<<6)    /* Clock source */
 #define GPTCR_TEN       (1)    /* Timer enable */
 
-#define        TIMER_FREQ_HZ   mxc_get_clock(MXC_IPG_CLK)
-
+/*
+ * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
+ * "tick" is internal timer period
+ */
+/* ~0.4% error - measured with stop-watch on 100s boot-delay */
 static inline unsigned long long tick_to_time(unsigned long long tick)
 {
        tick *= CONFIG_SYS_HZ;
-       do_div(tick, TIMER_FREQ_HZ);
+       do_div(tick, MXC_CLK32);
 
        return tick;
 }
 
-static inline unsigned long long us_to_tick(unsigned long long usec)
+static inline unsigned long long us_to_tick(unsigned long long us)
 {
-       usec *= TIMER_FREQ_HZ;
-       do_div(usec, 1000000);
+       us = us * MXC_CLK32 + 999999;
+       do_div(us, 1000000);
 
-       return usec;
+       return us;
 }
 
+/*
+ * nothing really to do with interrupts, just starts up a counter.
+ * The 32KHz 32-bit timer overruns in 134217 seconds
+ */
 int timer_init(void)
 {
        int i;
        struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
+       struct ccm_regs *ccm = (struct ccm_regs *)CCM_BASE_ADDR;
 
        /* setup GP Timer 1 */
        writel(GPTCR_SWR, &gpt->ctrl);
-       for (i = 0; i < 100; i++)
-               writel(0, &gpt->ctrl);  /* We have no udelay by now */
 
-       writel(0, &gpt->pre);
-       /* Freerun Mode, PERCLK1 input */
-       writel(readl(&gpt->ctrl) |
-               GPTCR_CLKSOURCE_IPG | GPTCR_TEN,
-               &gpt->ctrl);
+       writel(readl(&ccm->cgr1) | 3 << MXC_CCM_CGR1_GPT_OFFSET, &ccm->cgr1);
+
+       for (i = 0; i < 100; i++)
+               writel(0, &gpt->ctrl); /* We have no udelay by now */
+       writel(0, &gpt->pre); /* prescaler = 1 */
+       /* Freerun Mode, 32KHz input */
+       writel(readl(&gpt->ctrl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR,
+                       &gpt->ctrl);
+       writel(readl(&gpt->ctrl) | GPTCR_TEN, &gpt->ctrl);
 
        return 0;
 }
@@ -101,7 +95,7 @@ ulong get_timer_masked(void)
 {
        /*
         * get_ticks() returns a long long (64 bit), it wraps in
-        * 2^64 / CONFIG_MX25_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
+        * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
         * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
         * 5 * 10^6 days - long enough.
         */
@@ -132,5 +126,5 @@ void __udelay(unsigned long usec)
  */
 ulong get_tbclk(void)
 {
-       return TIMER_FREQ_HZ;
+       return MXC_CLK32;
 }