arm: Remove deprecated and now unused NAND SPL

[u-boot] / arch / arm / cpu / arm1176 / start.S

diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 40df4b161428dd3343ba0eb8730908a98bdd1720..a7cf728ff199f58d0dcb85233da3931fad4a9c30 100644 (file)
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -51,7 +51,7 @@
 
 .globl _start
 _start: b      reset
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
        ldr     pc, _undefined_instruction
        ldr     pc, _software_interrupt
        ldr     pc, _prefetch_abort
@@ -98,7 +98,11 @@ _end_vect:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+       .word   CONFIG_SPL_TEXT_BASE
+#else
        .word   CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * Below variable is very important because we use MMU in U-Boot.
@@ -119,9 +123,13 @@ _TEXT_PHY_BASE:
 _bss_start_ofs:
        .word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+       .word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
-       .word __bss_end__ - _start
+       .word __bss_end - _start
 
 .globl _end_ofs
 _end_ofs:
@@ -164,7 +172,7 @@ cpu_init_crit:
         * When booting from NAND - it has definitely been a reset, so, no need
         * to flush caches and disable the MMU
         */
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
        /*
         * flush v4 I/D caches
         */
@@ -229,29 +237,24 @@ skip_tcmdisable:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
- *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
+ * void relocate_code(addr_moni)
  *
+ * This function relocates the monitor code.
  */
        .globl  relocate_code
 relocate_code:
-       mov     r4, r0  /* save addr_sp */
-       mov     r5, r1  /* save addr of gd */
-       mov     r6, r2  /* save addr of destination */
+       mov     r6, r0  /* save addr of destination */
 
        adr     r0, _start
-       cmp     r0, r6
-       moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
+       subs    r9, r6, r0              /* r9 <- relocation offset */
        beq     relocate_done           /* skip relocation */
        mov     r1, r6                  /* r1 <- scratch for copy_loop */
-       ldr     r3, _bss_start_ofs
+       ldr     r3, _image_copy_end_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
 
 copy_loop:
-       ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
+       ldmia   r0!, {r10-r11}          /* copy from source address [r0]    */
+       stmia   r1!, {r10-r11}          /* copy to   target address [r1]    */
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
@@ -260,7 +263,6 @@ copy_loop:
         * fix .rel.dyn relocations
         */
        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r6, r0              /* r9 <- relocation offset */
        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
        add     r10, r10, r0            /* r10 <- sym table in FLASH */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
@@ -355,7 +357,7 @@ c_runtime_cpu_setup:
 
        mov     pc, lr
 
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
 /*
  * we assume that cache operation is done before. (eg. cleanup_before_linux())
  * actually, we don't need to do anything about cache if not use d-cache in
@@ -533,4 +535,4 @@ fiq:
        get_bad_stack
        bad_save_user_regs
        bl      do_fiq
-#endif /* CONFIG_NAND_SPL */
+#endif /* CONFIG_SPL_BUILD */