/*
* armboot - Startup Code for ARM920 CPU-core
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
orr r0, r0, #0xd3
msr cpsr, r0
- bl coloured_LED_init
- bl red_LED_on
-
#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
/*
* relocate exception table
# if defined(CONFIG_S3C2400)
# define pWTCON 0x15300000
-# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
+# define INTMSK 0x14400008 /* Interrupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
#else
# define pWTCON 0x53000000
-# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
+# define INTMSK 0x4A000008 /* Interrupt-Controller base addresses */
# define INTSUBMSK 0x4A00001C
# define CLKDIVN 0x4C000014 /* clock divisor register */
# endif
bl cpu_init_crit
#endif
-/* Set stackpointer in internal RAM to call board_init_f */
-call_board_init_f:
- ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
- ldr r0,=0x00000000
- bl board_init_f
+ bl _main
/*------------------------------------------------------------------------------*/
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
- /* Set up the stack */
-stack_setup:
- mov sp, r4
-
adr r0, _start
cmp r0, r6
- beq clear_bss /* skip relocation */
+ moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
+ beq relocate_done /* skip relocation */
mov r1, r6 /* r1 <- scratch for copy_loop */
- ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
-#ifndef CONFIG_PRELOADER
+#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
blo fixloop
#endif
-clear_bss:
-#ifndef CONFIG_PRELOADER
- ldr r0, _bss_start_ofs
- ldr r1, _bss_end_ofs
- ldr r3, _TEXT_BASE /* Text base */
- mov r4, r6 /* reloc addr */
- add r0, r0, r4
- add r1, r1, r4
- mov r2, #0x00000000 /* clear */
-
-clbss_l:str r2, [r0] /* clear loop... */
- add r0, r0, #4
- cmp r0, r1
- bne clbss_l
-
- bl coloured_LED_init
- bl red_LED_on
-#endif
-
-/*
- * We are done. Do not return, instead branch to second part of board
- * initialization, now running from RAM.
- */
-#ifdef CONFIG_NAND_SPL
- ldr r0, _nand_boot_ofs
- mov pc, r0
+relocate_done:
-_nand_boot_ofs:
- .word nand_boot
-#else
- ldr r0, _board_init_r_ofs
- adr r1, _start
- add lr, r0, r1
- add lr, lr, r9
- /* setup parameters for board_init_r */
- mov r0, r5 /* gd_t */
- mov r1, r6 /* dest_addr */
- /* jump to it ... */
mov pc, lr
-_board_init_r_ofs:
- .word board_init_r - _start
-#endif
-
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
_dynsym_start_ofs:
.word __dynsym_start - _start
+ .globl c_runtime_cpu_setup
+c_runtime_cpu_setup:
+
+ mov pc, lr
+
/*
*************************************************************************
*