Merge branch 'buildman' of git://git.denx.de/u-boot-x86

[u-boot] / arch / arm / cpu / arm926ejs / kirkwood / cpu.c

diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index b4a4c0428f9bc98ef96b0ca27ea56b231145ed5e..9e412bbb04d585c949f321ddd04032a652a92e00 100644 (file)
--- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
@@ -3,33 +3,16 @@
  * Marvell Semiconductor <www.marvell.com>
  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <netdev.h>
 #include <asm/cache.h>
-#include <u-boot/md5.h>
-#include <asm/arch/kirkwood.h>
-#include <hush.h>
-
-#define BUFLEN 16
+#include <asm/io.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/soc.h>
+#include <mvebu_mmc.h>
 
 void reset_cpu(unsigned long ignored)
 {
@@ -43,31 +26,6 @@ void reset_cpu(unsigned long ignored)
        while (1) ;
 }
 
-/*
- * Generates Ramdom hex number reading some time varient system registers
- * and using md5 algorithm
- */
-unsigned char get_random_hex(void)
-{
-       int i;
-       u32 inbuf[BUFLEN];
-       u8 outbuf[BUFLEN];
-
-       /*
-        * in case of 88F6281/88F6282/88F6192 A0,
-        * Bit7 need to reset to generate random values in KW_REG_UNDOC_0x1470
-        * Soc reg offsets KW_REG_UNDOC_0x1470 and KW_REG_UNDOC_0x1478 are
-        * reserved regs and does not have names at this moment
-        * (no errata available)
-        */
-       writel(readl(KW_REG_UNDOC_0x1478) & ~(1 << 7), KW_REG_UNDOC_0x1478);
-       for (i = 0; i < BUFLEN; i++) {
-               inbuf[i] = readl(KW_REG_UNDOC_0x1470);
-       }
-       md5((u8 *) inbuf, (BUFLEN * sizeof(u32)), outbuf);
-       return outbuf[outbuf[7] % 0x0f];
-}
-
 /*
  * Window Size
  * Used with the Base register to set the address window size and location.
@@ -153,50 +111,6 @@ int kw_config_adr_windows(void)
        return 0;
 }
 
-/*
- * kw_config_gpio - GPIO configuration
- */
-void kw_config_gpio(u32 gpp0_oe_val, u32 gpp1_oe_val, u32 gpp0_oe, u32 gpp1_oe)
-{
-       struct kwgpio_registers *gpio0reg =
-               (struct kwgpio_registers *)KW_GPIO0_BASE;
-       struct kwgpio_registers *gpio1reg =
-               (struct kwgpio_registers *)KW_GPIO1_BASE;
-
-       /* Init GPIOS to default values as per board requirement */
-       writel(gpp0_oe_val, &gpio0reg->dout);
-       writel(gpp1_oe_val, &gpio1reg->dout);
-       writel(gpp0_oe, &gpio0reg->oe);
-       writel(gpp1_oe, &gpio1reg->oe);
-}
-
-/*
- * kw_config_mpp - Multi-Purpose Pins Functionality configuration
- *
- * Each MPP can be configured to different functionality through
- * MPP control register, ref (sec 6.1 of kirkwood h/w specification)
- *
- * There are maximum 64 Multi-Pourpose Pins on Kirkwood
- * Each MPP functionality can be configuration by a 4bit value
- * of MPP control reg, the value and associated functionality depends
- * upon used SoC varient
- */
-int kw_config_mpp(u32 mpp0_7, u32 mpp8_15, u32 mpp16_23, u32 mpp24_31,
-               u32 mpp32_39, u32 mpp40_47, u32 mpp48_55)
-{
-       u32 *mppreg = (u32 *) KW_MPP_BASE;
-
-       /* program mpp registers */
-       writel(mpp0_7, &mppreg[0]);
-       writel(mpp8_15, &mppreg[1]);
-       writel(mpp16_23, &mppreg[2]);
-       writel(mpp24_31, &mppreg[3]);
-       writel(mpp32_39, &mppreg[4]);
-       writel(mpp40_47, &mppreg[5]);
-       writel(mpp48_55, &mppreg[6]);
-       return 0;
-}
-
 /*
  * SYSRSTn Duration Counter Support
  *
@@ -224,13 +138,8 @@ static void kw_sysrst_action(void)
        }
 
        debug("Starting %s process...\n", __FUNCTION__);
-#if !defined(CONFIG_SYS_HUSH_PARSER)
-       ret = run_command (s, 0);
-#else
-       ret = parse_string_outer(s, FLAG_PARSE_SEMICOLON
-                                 | FLAG_EXIT_FROM_LOOP);
-#endif
-       if (ret < 0)
+       ret = run_command(s, 0);
+       if (ret != 0)
                debug("Error.. %s failed\n", __FUNCTION__);
        else
                debug("%s process finished\n", __FUNCTION__);
@@ -321,7 +230,7 @@ int arch_cpu_init(void)
        /*
         * Configures the I/O voltage of the pads connected to Egigabit
         * Ethernet interface to 1.8V
-        * By defult it is set to 3.3V
+        * By default it is set to 3.3V
         */
        reg = readl(KW_REG_MPP_OUT_DRV_REG);
        reg |= (1 << 7);
@@ -397,3 +306,11 @@ int cpu_eth_init(bd_t *bis)
        return 0;
 }
 #endif
+
+#ifdef CONFIG_MVEBU_MMC
+int board_mmc_init(bd_t *bis)
+{
+       mvebu_mmc_init(bis);
+       return 0;
+}
+#endif /* CONFIG_MVEBU_MMC */