arm: spear: Move to common SPL infrastructure

[u-boot] / arch / arm / cpu / arm926ejs / mxs / spl_power_init.c

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index 7fb734e9dc0159a53a97c25ddb2cbd3bac81c744..42f3df2ac22862f842c524c11f423d1fd31ffe94 100644 (file)
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -14,6 +14,13 @@
 
 #include "mxs_init.h"
 
+#ifdef CONFIG_SYS_MXS_VDD5V_ONLY
+#define DCDC4P2_DROPOUT_CONFIG POWER_DCDC4P2_DROPOUT_CTRL_100MV | \
+                               POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2
+#else
+#define DCDC4P2_DROPOUT_CONFIG POWER_DCDC4P2_DROPOUT_CTRL_100MV | \
+                               POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL
+#endif
 /**
  * mxs_power_clock2xtal() - Switch CPU core clock source to 24MHz XTAL
  *
@@ -303,8 +310,7 @@ static void mxs_power_init_4p2_params(void)
 
        clrsetbits_le32(&power_regs->hw_power_dcdc4p2,
                POWER_DCDC4P2_DROPOUT_CTRL_MASK,
-               POWER_DCDC4P2_DROPOUT_CTRL_100MV |
-               POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL);
+               DCDC4P2_DROPOUT_CONFIG);
 
        clrsetbits_le32(&power_regs->hw_power_5vctrl,
                POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK,
@@ -326,6 +332,11 @@ static void mxs_enable_4p2_dcdc_input(int xfer)
 
        debug("SPL: %s 4P2 DC-DC Input\n", xfer ? "Enabling" : "Disabling");
 
+       if (xfer && (readl(&power_regs->hw_power_5vctrl) &
+                       POWER_5VCTRL_ENABLE_DCDC)) {
+               return;
+       }
+
        prev_5v_brnout = readl(&power_regs->hw_power_5vctrl) &
                                POWER_5VCTRL_PWDN_5VBRNOUT;
        prev_5v_droop = readl(&power_regs->hw_power_ctrl) &
@@ -337,11 +348,6 @@ static void mxs_enable_4p2_dcdc_input(int xfer)
 
        clrbits_le32(&power_regs->hw_power_ctrl, POWER_CTRL_ENIRQ_VDD5V_DROOP);
 
-       if (xfer && (readl(&power_regs->hw_power_5vctrl) &
-                       POWER_5VCTRL_ENABLE_DCDC)) {
-               return;
-       }
-
        /*
         * Recording orignal values that will be modified temporarlily
         * to handle a chip bug. See chip errata for CQ ENGR00115837