*
* ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
*
- * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
- * Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
+ * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
*
* See file CREDITS for list of people who contributed to this
* project.
*/
+#ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
.globl _start
_start:
+.globl _NOR_BOOT_CFG
+_NOR_BOOT_CFG:
+ .word CONFIG_SYS_DV_NOR_BOOT_CFG
b reset
-#ifdef CONFIG_PRELOADER
+#else
+.globl _start
+_start:
+ b reset
+#endif
+#ifdef CONFIG_SPL_BUILD
/* No exception handlers in preloader */
ldr pc, _hang
ldr pc, _hang
_fiq:
.word fiq
-#endif /* CONFIG_PRELOADER */
+#endif /* CONFIG_SPL_BUILD */
.balignl 16,0xdeadbeef
.globl _TEXT_BASE
_TEXT_BASE:
+#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
+ .word CONFIG_SYS_TEXT_BASE
+#else
+#ifdef CONFIG_SPL_BUILD
+ .word CONFIG_SPL_TEXT_BASE
+#else
.word CONFIG_SYS_TEXT_BASE
+#endif
+#endif
/*
* These are defined in the board-specific linker script.
.globl _bss_end_ofs
_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
.word _end - _start
+#ifdef CONFIG_NAND_U_BOOT
+.globl _end
+_end:
+ .word __bss_end__
+#endif
+
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
+#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
+#else
+#ifdef CONFIG_SPL_BUILD
+ ldr sp, =(CONFIG_SPL_STACK)
+#else
+ ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
+#endif
+#endif
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_NAND_SPL)
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
- mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
- ldr r2, _TEXT_BASE
+ sub r9, r6, r0 /* r9 <- relocation offset */
+ cmp r0, r6
+ moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
+ beq clear_bss /* skip relocation */
+ mov r1, r6 /* r1 <- scratch for copy loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
- cmp r0, r6
- beq clear_bss
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
- stmia r6!, {r9-r10} /* copy to target address [r1] */
+ stmia r1!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
-#ifndef CONFIG_PRELOADER
+#ifndef CONFIG_SPL_BUILD
/*
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 <- Text base */
- sub r9, r7, r0 /* r9 <- relocation offset */
+ sub r9, r6, r0 /* r9 <- relocation offset */
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r10, r10, r0 /* r10 <- sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r0, r9 /* r0 <- location to fix up in RAM */
ldr r1, [r2, #4]
- and r8, r1, #0xff
- cmp r8, #23 /* relative fixup? */
+ and r7, r1, #0xff
+ cmp r7, #23 /* relative fixup? */
beq fixrel
- cmp r8, #2 /* absolute fixup? */
+ cmp r7, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
- add r1, r9 /* r1 <- relocated sym addr */
+ add r1, r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
#endif
clear_bss:
-#ifndef CONFIG_PRELOADER
+#ifdef CONFIG_SPL_BUILD
+ /* No relocation for SPL */
+ ldr r0, =__bss_start
+ ldr r1, =__bss_end__
+#else
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
- ldr r3, _TEXT_BASE /* Text base */
- mov r4, r7 /* reloc addr */
+ mov r4, r6 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
+#endif
mov r2, #0x00000000 /* clear */
-clbss_l:str r2, [r0] /* clear loop... */
+clbss_l:cmp r0, r1 /* clear loop... */
+ bhs clbss_e /* if reached end of bss, exit */
+ str r2, [r0]
add r0, r0, #4
- cmp r0, r1
- bne clbss_l
+ b clbss_l
+clbss_e:
+#ifndef CONFIG_SPL_BUILD
bl coloured_LED_init
- bl red_LED_on
+ bl red_led_on
#endif
/*
.word nand_boot
#else
ldr r0, _board_init_r_ofs
- adr r1, _start
+ ldr r1, _TEXT_BASE
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
- mov r1, r7 /* dest_addr */
+ mov r1, r6 /* dest_addr */
/* jump to it ... */
mov pc, lr
.word __rel_dyn_end - _start
_dynsym_start_ofs:
.word __dynsym_start - _start
+#endif
/*
*************************************************************************
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
cpu_init_crit:
/*
- * flush v4 I/D caches
+ * flush D cache before disabling it
*/
mov r0, #0
- mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
- mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
+flush_dcache:
+ mrc p15, 0, r15, c7, c10, 3
+ bne flush_dcache
+
+ mcr p15, 0, r0, c8, c7, 0 /* invalidate TLB */
+ mcr p15, 0, r0, c7, c5, 0 /* invalidate I Cache */
/*
- * disable MMU stuff and caches
+ * disable MMU and D cache
+ * enable I cache if CONFIG_SYS_ICACHE_OFF is not defined
*/
mrc p15, 0, r0, c1, c0, 0
- bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
+ bic r0, r0, #0x00000300 /* clear bits 9:8 (---- --RS) */
bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
+#ifdef CONFIG_SYS_EXCEPTION_VECTORS_HIGH
+ orr r0, r0, #0x00002000 /* set bit 13 (--V- ----) */
+#else
+ bic r0, r0, #0x00002000 /* clear bit 13 (--V- ----) */
+#endif
orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
+#ifndef CONFIG_SYS_ICACHE_OFF
orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
+#endif
mcr p15, 0, r0, c1, c0, 0
/*
mov pc, lr /* back to my caller */
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-#ifndef CONFIG_PRELOADER
+#ifndef CONFIG_SPL_BUILD
/*
*************************************************************************
*
.macro get_fiq_stack @ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm
-#endif /* CONFIG_PRELOADER */
+#endif /* CONFIG_SPL_BUILD */
/*
* exception handlers
*/
-#ifdef CONFIG_PRELOADER
+#ifdef CONFIG_SPL_BUILD
.align 5
do_hang:
ldr sp, _TEXT_BASE /* switch to abort stack */
1:
bl 1b /* hang and never return */
-#else /* !CONFIG_PRELOADER */
+#else /* !CONFIG_SPL_BUILD */
.align 5
undefined_instruction:
get_bad_stack
bl do_fiq
#endif
-#endif /* CONFIG_PRELOADER */
+#endif /* CONFIG_SPL_BUILD */