arm: rmobile: Add cpu_eth_init function

[u-boot] / arch / arm / cpu / arm926ejs / start.S

diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 6a09c028e45357f68cbac3aa3502c3a5af9a737a..521d46290cfb47fdeb8dd1071ad1cdf187141b1e 100644 (file)
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -194,7 +194,9 @@ reset:
         * we do sys-critical inits only at reboot,
         * not when booting from ram!
         */
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
        bl      cpu_init_crit
+#endif
 
 /* Set stackpointer in internal RAM to call board_init_f */
 call_board_init_f:
@@ -213,6 +215,7 @@ call_board_init_f:
 
 /*------------------------------------------------------------------------------*/
 
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_NAND_SPL)
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
@@ -342,6 +345,7 @@ _rel_dyn_end_ofs:
        .word __rel_dyn_end - _start
 _dynsym_start_ofs:
        .word __dynsym_start - _start
+#endif
 
 /*
  *************************************************************************
@@ -353,33 +357,45 @@ _dynsym_start_ofs:
  *
  *************************************************************************
  */
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 cpu_init_crit:
        /*
-        * flush v4 I/D caches
+        * flush D cache before disabling it
         */
        mov     r0, #0
-       mcr     p15, 0, r0, c7, c7, 0   /* flush v3/v4 cache */
-       mcr     p15, 0, r0, c8, c7, 0   /* flush v4 TLB */
+flush_dcache:
+       mrc     p15, 0, r15, c7, c10, 3
+       bne     flush_dcache
+
+       mcr     p15, 0, r0, c8, c7, 0   /* invalidate TLB */
+       mcr     p15, 0, r0, c7, c5, 0   /* invalidate I Cache */
 
        /*
-        * disable MMU stuff and caches
+        * disable MMU and D cache
+        * enable I cache if CONFIG_SYS_ICACHE_OFF is not defined
         */
        mrc     p15, 0, r0, c1, c0, 0
-       bic     r0, r0, #0x00002300     /* clear bits 13, 9:8 (--V- --RS) */
+       bic     r0, r0, #0x00000300     /* clear bits 9:8 (---- --RS) */
        bic     r0, r0, #0x00000087     /* clear bits 7, 2:0 (B--- -CAM) */
+#ifdef CONFIG_SYS_EXCEPTION_VECTORS_HIGH
+       orr     r0, r0, #0x00002000     /* set bit 13 (--V- ----) */
+#else
+       bic     r0, r0, #0x00002000     /* clear bit 13 (--V- ----) */
+#endif
        orr     r0, r0, #0x00000002     /* set bit 2 (A) Align */
+#ifndef CONFIG_SYS_ICACHE_OFF
        orr     r0, r0, #0x00001000     /* set bit 12 (I) I-Cache */
+#endif
        mcr     p15, 0, r0, c1, c0, 0
 
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
        /*
         * Go setup Memory and board specific bits prior to relocation.
         */
        mov     ip, lr          /* perserve link reg across call */
        bl      lowlevel_init   /* go setup pll,mux,memory */
        mov     lr, ip          /* restore link */
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
        mov     pc, lr          /* back to my caller */
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
 
 #ifndef CONFIG_SPL_BUILD
 /*