mx31: Define default SoC input clock frequencies

[u-boot] / arch / arm / cpu / arm946es / start.S

diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index f4950f70729a832d58df9150dc0134a8f2678e54..b4d1d2dd1c6f8e701ad51e97e0310109362f8295 100644 (file)
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -5,12 +5,12 @@
  *
  *  ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
  *
- *  Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
- *  Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
+ *  Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
+ *  Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
  *  Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
  *  Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
  *  Copyright (c) 2003 Kshitij <kshitij@ti.com>
- *  Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
+ *  Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -103,6 +103,10 @@ _bss_start_ofs:
 
 .globl _bss_end_ofs
 _bss_end_ofs:
+       .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
        .word _end - _start
 
 #ifdef CONFIG_USE_IRQ
@@ -146,6 +150,7 @@ reset:
 /* Set stackpointer in internal RAM to call board_init_f */
 call_board_init_f:
        ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
+       bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
        ldr     r0,=0x00000000
        bl      board_init_f
 
@@ -163,31 +168,30 @@ relocate_code:
        mov     r4, r0  /* save addr_sp */
        mov     r5, r1  /* save addr of gd */
        mov     r6, r2  /* save addr of destination */
-       mov     r7, r2  /* save addr of destination */
 
        /* Set up the stack                                                 */
 stack_setup:
        mov     sp, r4
 
        adr     r0, _start
-       ldr     r2, _TEXT_BASE
+       cmp     r0, r6
+       beq     clear_bss               /* skip relocation */
+       mov     r1, r6                  /* r1 <- scratch for copy_loop */
        ldr     r3, _bss_start_ofs
        add     r2, r0, r3              /* r2 <- source end address         */
-       cmp     r0, r6
-       beq     clear_bss
 
 copy_loop:
        ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
-       stmia   r6!, {r9-r10}           /* copy to   target address [r1]    */
+       stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
        cmp     r0, r2                  /* until source end address [r2]    */
        blo     copy_loop
 
-#ifndef CONFIG_PRELOADER
+#ifndef CONFIG_SPL_BUILD
        /*
         * fix .rel.dyn relocations
         */
        ldr     r0, _TEXT_BASE          /* r0 <- Text base */
-       sub     r9, r7, r0              /* r9 <- relocation offset */
+       sub     r9, r6, r0              /* r9 <- relocation offset */
        ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
        add     r10, r10, r0            /* r10 <- sym table in FLASH */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
@@ -198,10 +202,10 @@ fixloop:
        ldr     r0, [r2]                /* r0 <- location to fix up, IN FLASH! */
        add     r0, r0, r9              /* r0 <- location to fix up in RAM */
        ldr     r1, [r2, #4]
-       and     r8, r1, #0xff
-       cmp     r8, #23                 /* relative fixup? */
+       and     r7, r1, #0xff
+       cmp     r7, #23                 /* relative fixup? */
        beq     fixrel
-       cmp     r8, #2                  /* absolute fixup? */
+       cmp     r7, #2                  /* absolute fixup? */
        beq     fixabs
        /* ignore unknown type of fixup */
        b       fixnext
@@ -210,7 +214,7 @@ fixabs:
        mov     r1, r1, LSR #4          /* r1 <- symbol index in .dynsym */
        add     r1, r10, r1             /* r1 <- address of symbol in table */
        ldr     r1, [r1, #4]            /* r1 <- symbol value */
-       add     r1, r9                  /* r1 <- relocated sym addr */
+       add     r1, r1, r9              /* r1 <- relocated sym addr */
        b       fixnext
 fixrel:
        /* relative fix: increase location by offset */
@@ -224,19 +228,20 @@ fixnext:
 #endif
 
 clear_bss:
-#ifndef CONFIG_PRELOADER
+#ifndef CONFIG_SPL_BUILD
        ldr     r0, _bss_start_ofs
        ldr     r1, _bss_end_ofs
-       ldr     r3, _TEXT_BASE          /* Text base */
-       mov     r4, r7                  /* reloc addr */
+       mov     r4, r6                  /* reloc addr */
        add     r0, r0, r4
        add     r1, r1, r4
        mov     r2, #0x00000000         /* clear                            */
 
-clbss_l:str    r2, [r0]                /* clear loop...                    */
+clbss_l:cmp    r0, r1                  /* clear loop... */
+       bhs     clbss_e                 /* if reached end of bss, exit */
+       str     r2, [r0]
        add     r0, r0, #4
-       cmp     r0, r1
-       blo     clbss_l
+       b       clbss_l
+clbss_e:
 #endif
 
 /*
@@ -254,7 +259,7 @@ _nand_boot: .word nand_boot
        add     lr, lr, r9
        /* setup parameters for board_init_r */
        mov     r0, r5          /* gd_t */
-       mov     r1, r7          /* dest_addr */
+       mov     r1, r6          /* dest_addr */
        /* jump to it ... */
        mov     pc, lr