;
}
+#ifdef CONFIG_SPL_BUILD
+void board_init_f(ulong dummy)
+{
+ board_early_init_f();
+ sdram_init();
+}
+#endif
+
void s_init(void)
{
/*
setup_clocks_for_console();
uart_soft_reset();
#if defined(CONFIG_NOR_BOOT) || defined(CONFIG_QSPI_BOOT)
+ /* TODO: This does not work, gd is not available yet */
gd->baudrate = CONFIG_BAUDRATE;
serial_init();
gd->have_console = 1;
/* Enable RTC32K clock */
rtc32k_enable();
#endif
-#ifdef CONFIG_SPL_BUILD
- board_early_init_f();
- sdram_init();
-#endif
}
#endif