Exynos5: TMU: Add hardware tripping

[u-boot] / arch / arm / cpu / armv7 / exynos / power.c

diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c
index c765304fd5fd56f5043b80272789f5db41a9beb5..6375a81fd436386f2382b1c631bbd1ea1ad7fe8a 100644 (file)
--- a/arch/arm/cpu/armv7/exynos/power.c
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -52,3 +52,91 @@ void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable)
        if (cpu_is_exynos4())
                exynos4_mipi_phy_control(dev_index, enable);
 }
+
+void exynos5_set_usbhost_phy_ctrl(unsigned int enable)
+{
+       struct exynos5_power *power =
+               (struct exynos5_power *)samsung_get_base_power();
+
+       if (enable) {
+               /* Enabling USBHOST_PHY */
+               setbits_le32(&power->usbhost_phy_control,
+                               POWER_USB_HOST_PHY_CTRL_EN);
+       } else {
+               /* Disabling USBHOST_PHY */
+               clrbits_le32(&power->usbhost_phy_control,
+                               POWER_USB_HOST_PHY_CTRL_EN);
+       }
+}
+
+void set_usbhost_phy_ctrl(unsigned int enable)
+{
+       if (cpu_is_exynos5())
+               exynos5_set_usbhost_phy_ctrl(enable);
+}
+
+static void exynos5_dp_phy_control(unsigned int enable)
+{
+       unsigned int cfg;
+       struct exynos5_power *power =
+           (struct exynos5_power *)samsung_get_base_power();
+
+       cfg = readl(&power->dptx_phy_control);
+       if (enable)
+               cfg |= EXYNOS_DP_PHY_ENABLE;
+       else
+               cfg &= ~EXYNOS_DP_PHY_ENABLE;
+
+       writel(cfg, &power->dptx_phy_control);
+}
+
+void set_dp_phy_ctrl(unsigned int enable)
+{
+       if (cpu_is_exynos5())
+               exynos5_dp_phy_control(enable);
+}
+
+static void exynos5_set_ps_hold_ctrl(void)
+{
+       struct exynos5_power *power =
+               (struct exynos5_power *)samsung_get_base_power();
+
+       /* Set PS-Hold high */
+       setbits_le32(&power->ps_hold_control,
+                       EXYNOS_PS_HOLD_CONTROL_DATA_HIGH);
+}
+
+void set_ps_hold_ctrl(void)
+{
+       if (cpu_is_exynos5())
+               exynos5_set_ps_hold_ctrl();
+}
+
+
+static void exynos5_set_xclkout(void)
+{
+       struct exynos5_power *power =
+               (struct exynos5_power *)samsung_get_base_power();
+
+       /* use xxti for xclk out */
+       clrsetbits_le32(&power->pmu_debug, PMU_DEBUG_CLKOUT_SEL_MASK,
+                               PMU_DEBUG_XXTI);
+}
+
+void set_xclkout(void)
+{
+       if (cpu_is_exynos5())
+               exynos5_set_xclkout();
+}
+
+/* Enables hardware tripping to power off the system when TMU fails */
+void set_hw_thermal_trip(void)
+{
+       if (cpu_is_exynos5()) {
+               struct exynos5_power *power =
+                       (struct exynos5_power *)samsung_get_base_power();
+
+               /* PS_HOLD_CONTROL register ENABLE_HW_TRIP bit*/
+               setbits_le32(&power->ps_hold_control, POWER_ENABLE_HW_TRIP);
+       }
+}