config ARCH_LS1021A
bool
+ select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008407
+ select SYS_FSL_ERRATUM_A009663
+ select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
menu "LS102xA architecture"
depends on ARCH_LS1021A
+config FSL_PCIE_COMPAT
+ string "PCIe compatible of Kernel DT"
+ depends on PCIE_LAYERSCAPE
+ default "fsl,ls1021a-pcie" if ARCH_LS1021A
+ help
+ This compatible is used to find pci controller node in Kernel DT
+ to complete fixup.
+
config LS1_DEEP_SLEEP
bool "Deep sleep"
depends on ARCH_LS1021A
cores, count the reserved ports. This will allocate enough memory
in spin table to properly handle all cores.
-config NUM_DDR_CONTROLLERS
- int "Maximum DDR controllers"
- default 1
-
config SECURE_BOOT
bool "Secure Boot"
help
depends on ARCH_LS1021A
default 8
+config SYS_FSL_ERRATUM_A008407
+ bool
+
endmenu