Convert CONFIG_FSL_DCU_FB to Kconfig

[u-boot] / arch / arm / cpu / armv7 / ls102xa / Kconfig

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 17f19758a6948d01045f66c4d899ade6362460f5..b61f3cdcded1ece1b8a8af7b5973fb79dc674cc6 100644 (file)
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -1,12 +1,31 @@
 config ARCH_LS1021A
        bool
+       select SYS_FSL_ERRATUM_A008378
+       select SYS_FSL_ERRATUM_A008407
+       select SYS_FSL_ERRATUM_A009663
+       select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_ERRATUM_A010315
        select SYS_FSL_SRDS_1
        select SYS_HAS_SERDES
+       select SYS_FSL_DDR_BE if SYS_FSL_DDR
+       select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
+       select SYS_FSL_HAS_DDR3 if SYS_FSL_DDR
+       select SYS_FSL_HAS_DDR4 if SYS_FSL_DDR
+       select SYS_FSL_HAS_SEC
+       select SYS_FSL_SEC_COMPAT_5
+       select SYS_FSL_SEC_LE
 
 menu "LS102xA architecture"
        depends on ARCH_LS1021A
 
+config FSL_PCIE_COMPAT
+       string "PCIe compatible of Kernel DT"
+       depends on PCIE_LAYERSCAPE
+       default "fsl,ls1021a-pcie" if ARCH_LS1021A
+       help
+         This compatible is used to find pci controller node in Kernel DT
+         to complete fixup.
+
 config LS1_DEEP_SLEEP
        bool "Deep sleep"
        depends on ARCH_LS1021A
@@ -22,6 +41,12 @@ config MAX_CPUS
          cores, count the reserved ports. This will allocate enough memory
          in spin table to properly handle all cores.
 
+config SECURE_BOOT
+       bool    "Secure Boot"
+       help
+               Enable Freescale Secure Boot feature. Normally selected
+               by defconfig. If unsure, do not change.
+
 config SYS_FSL_ERRATUM_A010315
        bool "Workaround for PCIe erratum A010315"
 
@@ -39,4 +64,7 @@ config SYS_FSL_IFC_BANK_COUNT
        depends on ARCH_LS1021A
        default 8
 
+config SYS_FSL_ERRATUM_A008407
+       bool
+
 endmenu