arm: ls1021a: merge SoC specific code in a separate file

[u-boot] / arch / arm / cpu / armv7 / ls102xa / fdt.c

diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c
index 71a175392fd1c063e9149187694c0d7b8eb9f249..856abed94182ce741643a40bbe286bf613f97977 100644 (file)
--- a/arch/arm/cpu/armv7/ls102xa/fdt.c
+++ b/arch/arm/cpu/armv7/ls102xa/fdt.c
@@ -29,29 +29,30 @@ void ft_fixup_enet_phy_connect_type(void *fdt)
        char phy[16];
        int phy_node;
        int i = 0;
-       int enet_id = 0;
        uint32_t ph;
 
        while ((dev = eth_get_dev_by_index(i++)) != NULL) {
-               if (strstr(dev->name, "eTSEC1"))
-                       enet_id = 0;
-               else if (strstr(dev->name, "eTSEC2"))
-                       enet_id = 1;
-               else if (strstr(dev->name, "eTSEC3"))
-                       enet_id = 2;
-               else
+               if (strstr(dev->name, "eTSEC1")) {
+                       strcpy(enet, "ethernet0");
+                       strcpy(phy, "enet0_rgmii_phy");
+               } else if (strstr(dev->name, "eTSEC2")) {
+                       strcpy(enet, "ethernet1");
+                       strcpy(phy, "enet1_rgmii_phy");
+               } else if (strstr(dev->name, "eTSEC3")) {
+                       strcpy(enet, "ethernet2");
+                       strcpy(phy, "enet2_rgmii_phy");
+               } else {
                        continue;
+               }
 
                priv = dev->priv;
                if (priv->flags & TSEC_SGMII)
                        continue;
 
-               sprintf(enet, "ethernet%d", enet_id);
                enet_path = fdt_get_alias(fdt, enet);
                if (!enet_path)
                        continue;
 
-               sprintf(phy, "enet%d_rgmii_phy", enet_id);
                phy_path = fdt_get_alias(fdt, phy);
                if (!phy_path)
                        continue;
@@ -170,7 +171,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
        do_fixup_by_compat_u32(blob, "fsl, ls1021a-flexcan",
                               "clock-frequency", busclk / 2, 1);
 
-#ifdef CONFIG_QSPI_BOOT
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
        off = fdt_node_offset_by_compat_reg(blob, FSL_IFC_COMPAT,
                                            CONFIG_SYS_IFC_ADDR);
        fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0);