armv7: ls1021a: Move DDR config options to Kconfig

[u-boot] / arch / arm / cpu / armv7 / ls102xa / ls102xa_psci.c

diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
index 2ac2e6cf9eabcb00d5f80d28fa18509c155a02c2..1cbe93cf41f139f6dfb0c0fa8d6ae5e1f6352047 100644 (file)
--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
@@ -43,7 +43,7 @@ static void __secure ls1_save_ddr_head(void)
 static void __secure ls1_fsm_setup(void)
 {
        void *dcsr_epu_base = (void *)(CONFIG_SYS_DCSRBAR + EPU_BLOCK_OFFSET);
-       void *dcsr_rcpm_base = (void *)CONFIG_SYS_DCSR_RCPM_ADDR;
+       void *dcsr_rcpm_base = (void *)SYS_FSL_DCSR_RCPM_ADDR;
 
        out_be32(dcsr_rcpm_base + DCSR_RCPM_CSTTACR0, 0x00001001);
        out_be32(dcsr_rcpm_base + DCSR_RCPM_CG1CR0, 0x00000001);
@@ -112,7 +112,7 @@ static void __secure ls1_delay(unsigned int loop)
 static void __secure ls1_start_fsm(void)
 {
        void *dcsr_epu_base = (void *)(CONFIG_SYS_DCSRBAR + EPU_BLOCK_OFFSET);
-       void *ccsr_gic_base = (void *)CONFIG_SYS_GIC_ADDR;
+       void *ccsr_gic_base = (void *)SYS_FSL_GIC_ADDR;
        struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
        struct ccsr_ddr __iomem *ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;