Merge branch 'next' of git://git.denx.de/u-boot-mpc83xx

[u-boot] / arch / arm / cpu / armv7 / omap-common / vc.c

diff --git a/arch/arm/cpu/armv7/omap-common/vc.c b/arch/arm/cpu/armv7/omap-common/vc.c
index a045b77180f7aa091cc506de35244bedff993c42..a68f1d145dcb480a50ed1d38dd8a2fb533a4c116 100644 (file)
--- a/arch/arm/cpu/armv7/omap-common/vc.c
+++ b/arch/arm/cpu/armv7/omap-common/vc.c
@@ -17,6 +17,7 @@
 #include <common.h>
 #include <asm/omap_common.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/arch/clock.h>
 
 /*
  * Define Master code if there are multiple masters on the I2C_SR bus.
@@ -57,7 +58,7 @@
  * omap_vc_init() - Initialization for Voltage controller
  * @speed_khz: I2C buspeed in KHz
  */
-void omap_vc_init(u16 speed_khz)
+static void omap_vc_init(u16 speed_khz)
 {
        u32 val;
        u32 sys_clk_khz, cycles_hi, cycles_low;
@@ -81,13 +82,13 @@ void omap_vc_init(u16 speed_khz)
        cycles_low -= 7;
        val = (cycles_hi << PRM_VC_CFG_I2C_CLK_SCLH_SHIFT) |
               (cycles_low << PRM_VC_CFG_I2C_CLK_SCLL_SHIFT);
-       writel(val, &prcm->prm_vc_cfg_i2c_clk);
+       writel(val, (*prcm)->prm_vc_cfg_i2c_clk);
 
        val = CONFIG_OMAP_VC_I2C_HS_MCODE <<
                PRM_VC_CFG_I2C_MODE_HSMCODE_SHIFT;
        /* No HS mode for now */
        val &= ~PRM_VC_CFG_I2C_MODE_HSMODEEN_BIT;
-       writel(val, &prcm->prm_vc_cfg_i2c_mode);
+       writel(val, (*prcm)->prm_vc_cfg_i2c_mode);
 }
 
 /**
@@ -113,14 +114,15 @@ int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data)
        reg_val = sa << PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT |
            reg_addr << PRM_VC_VAL_BYPASS_REGADDR_SHIFT |
            reg_data << PRM_VC_VAL_BYPASS_DATA_SHIFT;
-       writel(reg_val, &prcm->prm_vc_val_bypass);
+       writel(reg_val, (*prcm)->prm_vc_val_bypass);
 
        /* Signal VC to send data */
-       writel(reg_val | PRM_VC_VAL_BYPASS_VALID_BIT, &prcm->prm_vc_val_bypass);
+       writel(reg_val | PRM_VC_VAL_BYPASS_VALID_BIT,
+                               (*prcm)->prm_vc_val_bypass);
 
        /* Wait on VC to complete transmission */
        do {
-               reg_val = readl(&prcm->prm_vc_val_bypass) &
+               reg_val = readl((*prcm)->prm_vc_val_bypass) &
                                PRM_VC_VAL_BYPASS_VALID_BIT;
                if (!reg_val)
                        break;
@@ -136,3 +138,14 @@ int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data)
        /* All good.. */
        return 0;
 }
+
+void sri2c_init(void)
+{
+       static int sri2c = 1;
+
+       if (sri2c) {
+               omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ);
+               sri2c = 0;
+       }
+       return;
+}