omap: gpmc: 'nandecc sw' can use HAM1 or BCH8

[u-boot] / arch / arm / cpu / armv7 / omap3 / clock.c

diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c
index 529ad9a942448fa66ba1d2c86c11a66f84572d88..006969e780b332ccab15c4da7d8826efb1ba84b9 100644 (file)
--- a/arch/arm/cpu/armv7/omap3/clock.c
+++ b/arch/arm/cpu/armv7/omap3/clock.c
@@ -732,11 +732,20 @@ void per_clocks_enable(void)
        setbits_le32(&prcm_base->iclken_per, 0x08);     /* ICKen GPT2 */
        setbits_le32(&prcm_base->fclken_per, 0x08);     /* FCKen GPT2 */
 
+       /* Enable GP9 timer. */
+       setbits_le32(&prcm_base->clksel_per, 0x80);     /* GPT9 = 32kHz clk */
+       setbits_le32(&prcm_base->iclken_per, 0x400);    /* ICKen GPT9 */
+       setbits_le32(&prcm_base->fclken_per, 0x400);    /* FCKen GPT9 */
+
 #ifdef CONFIG_SYS_NS16550
        /* Enable UART1 clocks */
        setbits_le32(&prcm_base->fclken1_core, 0x00002000);
        setbits_le32(&prcm_base->iclken1_core, 0x00002000);
 
+       /* Enable UART2 clocks */
+       setbits_le32(&prcm_base->fclken1_core, 0x00004000);
+       setbits_le32(&prcm_base->iclken1_core, 0x00004000);
+
        /* UART 3 Clocks */
        setbits_le32(&prcm_base->fclken_per, 0x00000800);
        setbits_le32(&prcm_base->iclken_per, 0x00000800);