]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/cpu/armv7/omap3/lowlevel_init.S
clock_am43xx:Set the MAC clock to /5 for OPP100
[u-boot] / arch / arm / cpu / armv7 / omap3 / lowlevel_init.S
index 98c3c03a0eb16e6f8fac2d23aa2246d4c5e13288..78577b1d1c75bc0632be5725fea1be4b2d0f8cad 100644 (file)
@@ -17,9 +17,6 @@
 #include <asm/arch/clocks_omap3.h>
 #include <linux/linkage.h>
 
-_TEXT_BASE:
-       .word   CONFIG_SYS_TEXT_BASE    /* sdram load addr from config.mk */
-
 #ifdef CONFIG_SPL_BUILD
 ENTRY(save_boot_params)
        ldr     r4, =omap3_boot_device
@@ -69,15 +66,13 @@ ENDPROC(do_omap3_emu_romcode_call)
  *************************************************************************/
 ENTRY(cpy_clk_code)
        /* Copy DPLL code into SRAM */
-       adr     r0, go_to_speed         /* get addr of clock setting code */
-       mov     r2, #384                /* r2 size to copy (div by 32 bytes) */
-       mov     r1, r1                  /* r1 <- dest address (passed in) */
-       add     r2, r2, r0              /* r2 <- source end address */
+       adr     r0, go_to_speed         /* copy from start of go_to_speed... */
+       adr     r2, lowlevel_init       /* ... up to start of low_level_init */
 next2:
        ldmia   r0!, {r3 - r10}         /* copy from source address [r0] */
        stmia   r1!, {r3 - r10}         /* copy to   target address [r1] */
        cmp     r0, r2                  /* until source end address [r2] */
-       bne     next2
+       blo     next2
        mov     pc, lr                  /* back to caller */
 ENDPROC(cpy_clk_code)