]> git.sur5r.net Git - u-boot/blobdiff - arch/arm/cpu/armv7/omap4/sdram_elpida.c
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
[u-boot] / arch / arm / cpu / armv7 / omap4 / sdram_elpida.c
index 239ad2b07c5785a98b90cd6f77b727718e4692a6..20fc55216a1fb6aeca590695f55da5760dc88b8f 100644 (file)
@@ -90,22 +90,28 @@ const struct emif_regs emif_regs_elpida_400_mhz_2cs = {
        .emif_ddr_phy_ctlr_1            = 0x049ff418
 };
 
-/* Dummy registers for OMAP44xx */
-const u32 ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG];
-const u32 ddr3_ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG];
-
 const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2 = {
        .dmm_lisa_map_0 = 0xFF020100,
        .dmm_lisa_map_1 = 0,
        .dmm_lisa_map_2 = 0,
-       .dmm_lisa_map_3 = 0x80540300
+       .dmm_lisa_map_3 = 0x80540300,
+       .is_ma_present  = 0x0
 };
 
 const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2 = {
        .dmm_lisa_map_0 = 0xFF020100,
        .dmm_lisa_map_1 = 0,
        .dmm_lisa_map_2 = 0,
-       .dmm_lisa_map_3 = 0x80640300
+       .dmm_lisa_map_3 = 0x80640300,
+       .is_ma_present  = 0x0
+};
+
+const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2 = {
+       .dmm_lisa_map_0 = 0xFF020100,
+       .dmm_lisa_map_1 = 0,
+       .dmm_lisa_map_2 = 0,
+       .dmm_lisa_map_3 = 0x80640300,
+       .is_ma_present  = 0x1
 };
 
 static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs)
@@ -130,8 +136,10 @@ static void emif_get_dmm_regs_sdp(const struct dmm_lisa_map_regs
 
        if (omap_rev == OMAP4430_ES1_0)
                *dmm_lisa_regs = &lisa_map_2G_x_1_x_2;
-       else
+       else if (omap_rev < OMAP4460_ES1_0)
                *dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
+       else
+               *dmm_lisa_regs = &ma_lisa_map_2G_x_2_x_2;
 }
 
 void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
@@ -285,3 +293,16 @@ void emif_get_device_timings(u32 emif_nr,
        __attribute__((weak, alias("emif_get_device_timings_sdp")));
 
 #endif /* CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS */
+
+const struct lpddr2_mr_regs mr_regs = {
+       .mr1    = MR1_BL_8_BT_SEQ_WRAP_EN_NWR_3,
+       .mr2    = 0x4,
+       .mr3    = -1,
+       .mr10   = MR10_ZQ_ZQINIT,
+       .mr16   = MR16_REF_FULL_ARRAY
+};
+
+void get_lpddr2_mr_regs(const struct lpddr2_mr_regs **regs)
+{
+       *regs = &mr_regs;
+}